o n b o a r d X e s s X S A - 5 0
X S T - 2
De Pin Alessandro
| Electronic Engineering course, Trieste University, Applied Electronic exam | |
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o n b o a r d X e s s X S A - 5 0 X S T - 2 De Pin Alessandro |
| This project develops an I2C master device
implementation using FPGA Spartan 2 chip on Xess XSA50 board.
This device is intended to configure one or more slave writing data stored in a memory (it has been developed in VHDL language too) in their internal registers. It has been used the SAA1064 display driver (by Philips) as test integrated circuit; however this master would be employed in the most general pourpose. The project has been developed with Xilinx ISE 5.3 software. Clicking on the links below you can download all files which make up the project, so you would be capable on testing them. If you want you can also modify memory contents adding or changing cells and recompiling it. | |
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ControllerI2c.bit
68.3KB Click here to download the bitstream file, ready to be downloaded on XSA-50 |
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RelazioneI2C.pdf 230KB Click here to download the documentation file (Italian) |
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MasterI2C.zip
472KB Click here to download the full XILINX project. This archive file holds all vhdl modules and schematics which compose the project. |