Electronic Engineering course, Trieste University, Electronic II exam
	Butterfly Block for Xilinx ISE 6.1.01i development tool Giovanni Biancuzzi, Igor Cerniava, Mitja Gustin

This project provides a Butterfly Block ready to be used on the Xilinx ISE 6.1.01i to design FFT blocks . It calculates the results of a butterfly block getting the input data from an external RAM. Due to the presence of a multiplier inside, it must be used sequentially on couples of samples in order to use only one block at a time. It has all the I/O necessary to interface with the external blocks . The project is just a building block and must be integrated in a larger project in order to be used on the Xess board.
	butterfly.doc 341KB (In Italian) Click here to download the documentation file (Word) This documentation explains step by step how the block works.
	butterfly.zip 464KB Click here to download the full XILINX project. This archive file holds all vhdl modules and schematics that compose the project.