library IEEE;
use IEEE.std_logic_1164.all;

entity prova is

   port( clk : 		in std_logic;  
   	 reset : 	in std_logic;  
	 tasto : 	in std_logic;  
	 ChipEnable : 	out std_logic);

end prova;

architecture SYN_USE_DEFA_ARCH_NAME of prova is
   
   -- Declare an enum type for the state
   type STATE_TYPE is (INIT, INT1, START, INT2);  
   -- Declare state variables
   signal STATE : STATE_TYPE;
   signal NEXT_STATE : STATE_TYPE;
   
begin
   -- This process sets the next state on the clock edge.
   SET_STATE: process ( clk, reset )
   begin
      if ( reset = '1' ) then
         STATE <= INIT;
      elsif ( clk'event and clk = '1' ) then
         STATE <= NEXT_STATE;
      end if;
   end process SET_STATE;
   
   -- This process determines the next state and output values
   -- based on the current state and input values.
   SET_NEXT_STATE: process (STATE, tasto)
      variable NEXT_STATE_VALUE : STATE_TYPE;
   begin
      
      -- Set defaults for the next state and all outputs.
      ChipEnable <= 'X';
      NEXT_STATE_VALUE := INIT;
      case STATE is
         when INIT =>
            if (tasto = '0' ) then
               NEXT_STATE_VALUE := INIT;
            end if;
            if (tasto = '1' ) then 
               NEXT_STATE_VALUE := INT1;
            end if;
	    ChipEnable <= '0';
         when INT1 =>
            if (tasto = '1' ) then
               NEXT_STATE_VALUE := INT1;
            end if;
            if (tasto = '0' ) then
               NEXT_STATE_VALUE := START;
            end if;
	    ChipEnable <= '0';
         when START =>
            if (tasto = '0' ) then
               NEXT_STATE_VALUE := START;
            end if;
            if (tasto = '1' ) then
               NEXT_STATE_VALUE := INT2;
            end if;
	    ChipEnable <= '1';
         when INT2 =>
            if (tasto = '1' ) then
               NEXT_STATE_VALUE := INT2;
            end if;
            if (tasto = '0' ) then
               NEXT_STATE_VALUE := INIT;
            end if;
	    ChipEnable <= '1';
      end case;
      NEXT_STATE <= NEXT_STATE_VALUE;
   end process SET_NEXT_STATE;

end SYN_USE_DEFA_ARCH_NAME;