;******************************************************************************
;* TMS320C6x C/C++ Codegen                                          PC v7.4.1 *
;* Date/Time created: Fri May 15 11:51:13 2020                                *
;******************************************************************************
	.compiler_opts --abi=coffabi --c64p_l1d_workaround=off --endian=little --hll_source=on --long_precision_bits=40 --mem_model:code=near --mem_model:const=data --mem_model:data=far_aggregates --object_format=coff --silicon_version=6740 --symdebug:dwarf 

;******************************************************************************
;* GLOBAL FILE PARAMETERS                                                     *
;*                                                                            *
;*   Architecture      : TMS320C674x                                          *
;*   Optimization      : Enabled at level 3                                   *
;*   Optimizing for    : Speed                                                *
;*                       Based on options: -o3, no -ms                        *
;*   Endian            : Little                                               *
;*   Interrupt Thrshld : Disabled                                             *
;*   Data Access Model : Far Aggregate Data                                   *
;*   Pipelining        : Enabled                                              *
;*   Speculate Loads   : Enabled with threshold = 0                           *
;*   Memory Aliases    : Presume are aliases (pessimistic)                    *
;*   Debug Info        : DWARF Debug                                          *
;*                                                                            *
;******************************************************************************

	.asg	A15, FP
	.asg	B14, DP
	.asg	B15, SP
	.global	$bss


$C$DW$CU	.dwtag  DW_TAG_compile_unit
	.dwattr $C$DW$CU, DW_AT_name("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$CU, DW_AT_producer("TMS320C6x C/C++ Codegen PC v7.4.1 Copyright (c) 1996-2012 Texas Instruments Incorporated")
	.dwattr $C$DW$CU, DW_AT_TI_version(0x01)
	.dwattr $C$DW$CU, DW_AT_comp_dir("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug")
;*****************************************************************************
;* CINIT RECORDS                                                             *
;*****************************************************************************
	.sect	".cinit"
	.align	8
	.field  	4,32
	.field  	_fb+0,32
	.field	1,32			; _fb @ 0

	.sect	".cinit"
	.align	8
	.field  	$C$IR_1,32
	.field  	_sreg+0,32
	.field	65535,32			; _sreg._regval @ 0
$C$IR_1:	.set	4

	.sect	".cinit"
	.align	8
	.field  	4,32
	.field  	_prand_seed+0,32
	.field	1,32			; _prand_seed @ 0


$C$DW$1	.dwtag  DW_TAG_subprogram, DW_AT_name("malloc")
	.dwattr $C$DW$1, DW_AT_TI_symbol_name("_malloc")
	.dwattr $C$DW$1, DW_AT_type(*$C$DW$T$3)
	.dwattr $C$DW$1, DW_AT_declaration
	.dwattr $C$DW$1, DW_AT_external
$C$DW$2	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$2, DW_AT_type(*$C$DW$T$50)
	.dwendtag $C$DW$1


$C$DW$3	.dwtag  DW_TAG_subprogram, DW_AT_name("EVMOMAPL138_pinmuxConfig")
	.dwattr $C$DW$3, DW_AT_TI_symbol_name("_EVMOMAPL138_pinmuxConfig")
	.dwattr $C$DW$3, DW_AT_declaration
	.dwattr $C$DW$3, DW_AT_external
$C$DW$4	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$4, DW_AT_type(*$C$DW$T$19)
$C$DW$5	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$5, DW_AT_type(*$C$DW$T$19)
$C$DW$6	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$6, DW_AT_type(*$C$DW$T$19)
	.dwendtag $C$DW$3


$C$DW$7	.dwtag  DW_TAG_subprogram, DW_AT_name("EVMOMAPL138_lpscTransition")
	.dwattr $C$DW$7, DW_AT_TI_symbol_name("_EVMOMAPL138_lpscTransition")
	.dwattr $C$DW$7, DW_AT_declaration
	.dwattr $C$DW$7, DW_AT_external
$C$DW$8	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$8, DW_AT_type(*$C$DW$T$43)
$C$DW$9	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$9, DW_AT_type(*$C$DW$T$19)
$C$DW$10	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$10, DW_AT_type(*$C$DW$T$55)
$C$DW$11	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$11, DW_AT_type(*$C$DW$T$55)
	.dwendtag $C$DW$7


$C$DW$12	.dwtag  DW_TAG_subprogram, DW_AT_name("USTIMER_init")
	.dwattr $C$DW$12, DW_AT_TI_symbol_name("_USTIMER_init")
	.dwattr $C$DW$12, DW_AT_type(*$C$DW$T$19)
	.dwattr $C$DW$12, DW_AT_declaration
	.dwattr $C$DW$12, DW_AT_external

$C$DW$13	.dwtag  DW_TAG_subprogram, DW_AT_name("GPIO_setDir")
	.dwattr $C$DW$13, DW_AT_TI_symbol_name("_GPIO_setDir")
	.dwattr $C$DW$13, DW_AT_type(*$C$DW$T$19)
	.dwattr $C$DW$13, DW_AT_declaration
	.dwattr $C$DW$13, DW_AT_external
$C$DW$14	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$14, DW_AT_type(*$C$DW$T$19)
$C$DW$15	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$15, DW_AT_type(*$C$DW$T$55)
$C$DW$16	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$16, DW_AT_type(*$C$DW$T$55)
	.dwendtag $C$DW$13


$C$DW$17	.dwtag  DW_TAG_subprogram, DW_AT_name("GPIO_getInput")
	.dwattr $C$DW$17, DW_AT_TI_symbol_name("_GPIO_getInput")
	.dwattr $C$DW$17, DW_AT_type(*$C$DW$T$19)
	.dwattr $C$DW$17, DW_AT_declaration
	.dwattr $C$DW$17, DW_AT_external
$C$DW$18	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$18, DW_AT_type(*$C$DW$T$19)
$C$DW$19	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$19, DW_AT_type(*$C$DW$T$55)
$C$DW$20	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$20, DW_AT_type(*$C$DW$T$73)
	.dwendtag $C$DW$17


$C$DW$21	.dwtag  DW_TAG_subprogram, DW_AT_name("AIC3106_writeRegister")
	.dwattr $C$DW$21, DW_AT_TI_symbol_name("_AIC3106_writeRegister")
	.dwattr $C$DW$21, DW_AT_type(*$C$DW$T$19)
	.dwattr $C$DW$21, DW_AT_declaration
	.dwattr $C$DW$21, DW_AT_external
$C$DW$22	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$22, DW_AT_type(*$C$DW$T$55)
$C$DW$23	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$23, DW_AT_type(*$C$DW$T$55)
	.dwendtag $C$DW$21


$C$DW$24	.dwtag  DW_TAG_subprogram, DW_AT_name("vectors")
	.dwattr $C$DW$24, DW_AT_TI_symbol_name("_vectors")
	.dwattr $C$DW$24, DW_AT_declaration
	.dwattr $C$DW$24, DW_AT_external
	.bss	_poll,4,4
$C$DW$25	.dwtag  DW_TAG_variable, DW_AT_name("poll")
	.dwattr $C$DW$25, DW_AT_TI_symbol_name("_poll")
	.dwattr $C$DW$25, DW_AT_type(*$C$DW$T$10)
	.dwattr $C$DW$25, DW_AT_location[DW_OP_addr _poll]
	.global	_pingIN
	.bss	_pingIN,4,4
$C$DW$26	.dwtag  DW_TAG_variable, DW_AT_name("pingIN")
	.dwattr $C$DW$26, DW_AT_TI_symbol_name("_pingIN")
	.dwattr $C$DW$26, DW_AT_location[DW_OP_addr _pingIN]
	.dwattr $C$DW$26, DW_AT_type(*$C$DW$T$81)
	.dwattr $C$DW$26, DW_AT_external
	.global	_pingOUT
	.bss	_pingOUT,4,4
$C$DW$27	.dwtag  DW_TAG_variable, DW_AT_name("pingOUT")
	.dwattr $C$DW$27, DW_AT_TI_symbol_name("_pingOUT")
	.dwattr $C$DW$27, DW_AT_location[DW_OP_addr _pingOUT]
	.dwattr $C$DW$27, DW_AT_type(*$C$DW$T$81)
	.dwattr $C$DW$27, DW_AT_external
	.global	_pongIN
	.bss	_pongIN,4,4
$C$DW$28	.dwtag  DW_TAG_variable, DW_AT_name("pongIN")
	.dwattr $C$DW$28, DW_AT_TI_symbol_name("_pongIN")
	.dwattr $C$DW$28, DW_AT_location[DW_OP_addr _pongIN]
	.dwattr $C$DW$28, DW_AT_type(*$C$DW$T$81)
	.dwattr $C$DW$28, DW_AT_external
	.global	_pongOUT
	.bss	_pongOUT,4,4
$C$DW$29	.dwtag  DW_TAG_variable, DW_AT_name("pongOUT")
	.dwattr $C$DW$29, DW_AT_TI_symbol_name("_pongOUT")
	.dwattr $C$DW$29, DW_AT_location[DW_OP_addr _pongOUT]
	.dwattr $C$DW$29, DW_AT_type(*$C$DW$T$81)
	.dwattr $C$DW$29, DW_AT_external
	.global	_AIC31_data
_AIC31_data:	.usect	".far",4,4
$C$DW$30	.dwtag  DW_TAG_variable, DW_AT_name("AIC31_data")
	.dwattr $C$DW$30, DW_AT_TI_symbol_name("_AIC31_data")
	.dwattr $C$DW$30, DW_AT_location[DW_OP_addr _AIC31_data]
	.dwattr $C$DW$30, DW_AT_type(*$C$DW$T$46)
	.dwattr $C$DW$30, DW_AT_external
	.global	_fb
	.bss	_fb,4,4
$C$DW$31	.dwtag  DW_TAG_variable, DW_AT_name("fb")
	.dwattr $C$DW$31, DW_AT_TI_symbol_name("_fb")
	.dwattr $C$DW$31, DW_AT_location[DW_OP_addr _fb]
	.dwattr $C$DW$31, DW_AT_type(*$C$DW$T$10)
	.dwattr $C$DW$31, DW_AT_external
	.global	_sreg
_sreg:	.usect	".far",4,4
$C$DW$32	.dwtag  DW_TAG_variable, DW_AT_name("sreg")
	.dwattr $C$DW$32, DW_AT_TI_symbol_name("_sreg")
	.dwattr $C$DW$32, DW_AT_location[DW_OP_addr _sreg]
	.dwattr $C$DW$32, DW_AT_type(*$C$DW$T$49)
	.dwattr $C$DW$32, DW_AT_external
	.global	_prand_seed
	.bss	_prand_seed,4,4
$C$DW$33	.dwtag  DW_TAG_variable, DW_AT_name("prand_seed")
	.dwattr $C$DW$33, DW_AT_TI_symbol_name("_prand_seed")
	.dwattr $C$DW$33, DW_AT_location[DW_OP_addr _prand_seed]
	.dwattr $C$DW$33, DW_AT_type(*$C$DW$T$19)
	.dwattr $C$DW$33, DW_AT_external
;	C:\Program Files\ti\ccsv5\tools\compiler\c6000_7.4.1\bin\opt6x.exe C:\\Users\\SERGIO~1\\AppData\\Local\\Temp\\052322 C:\\Users\\SERGIO~1\\AppData\\Local\\Temp\\052324 
	.sect	".text"
	.clink
	.global	_read_LCDK_user_DIP

$C$DW$34	.dwtag  DW_TAG_subprogram, DW_AT_name("read_LCDK_user_DIP")
	.dwattr $C$DW$34, DW_AT_low_pc(_read_LCDK_user_DIP)
	.dwattr $C$DW$34, DW_AT_high_pc(0x00)
	.dwattr $C$DW$34, DW_AT_TI_symbol_name("_read_LCDK_user_DIP")
	.dwattr $C$DW$34, DW_AT_external
	.dwattr $C$DW$34, DW_AT_type(*$C$DW$T$55)
	.dwattr $C$DW$34, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$34, DW_AT_TI_begin_line(0x210)
	.dwattr $C$DW$34, DW_AT_TI_begin_column(0x09)
	.dwattr $C$DW$34, DW_AT_TI_max_frame_size(0x08)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 529,column 1,is_stmt,address _read_LCDK_user_DIP

	.dwfde $C$DW$CIE, _read_LCDK_user_DIP

;******************************************************************************
;* FUNCTION NAME: read_LCDK_user_DIP                                          *
;*                                                                            *
;*   Regs Modified     : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6,  *
;*                           B7,B8,B9,SP,A16,A17,A18,A19,A20,A21,A22,A23,A24, *
;*                           A25,A26,A27,A28,A29,A30,A31,B16,B17,B18,B19,B20, *
;*                           B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31      *
;*   Regs Used         : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6,  *
;*                           B7,B8,B9,DP,SP,A16,A17,A18,A19,A20,A21,A22,A23,  *
;*                           A24,A25,A26,A27,A28,A29,A30,A31,B16,B17,B18,B19, *
;*                           B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31  *
;*   Local Frame Size  : 0 Args + 4 Auto + 4 Save = 8 byte                    *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_read_LCDK_user_DIP:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
           STW     .D2T2   B3,*SP--(8)       ; |529| 
           NOP             1
	.dwcfi	cfa_offset, 8
	.dwcfi	save_reg_to_mem, 19, 0
$C$DW$35	.dwtag  DW_TAG_variable, DW_AT_name("DIP_1")
	.dwattr $C$DW$35, DW_AT_TI_symbol_name("_DIP_1")
	.dwattr $C$DW$35, DW_AT_type(*$C$DW$T$55)
	.dwattr $C$DW$35, DW_AT_location[DW_OP_breg31 4]
$C$DW$36	.dwtag  DW_TAG_variable, DW_AT_name("DIP_2")
	.dwattr $C$DW$36, DW_AT_TI_symbol_name("_DIP_2")
	.dwattr $C$DW$36, DW_AT_type(*$C$DW$T$55)
	.dwattr $C$DW$36, DW_AT_location[DW_OP_breg31 5]
$C$DW$37	.dwtag  DW_TAG_variable, DW_AT_name("DIP_3")
	.dwattr $C$DW$37, DW_AT_TI_symbol_name("_DIP_3")
	.dwattr $C$DW$37, DW_AT_type(*$C$DW$T$55)
	.dwattr $C$DW$37, DW_AT_location[DW_OP_breg31 6]
$C$DW$38	.dwtag  DW_TAG_variable, DW_AT_name("DIP_4")
	.dwattr $C$DW$38, DW_AT_TI_symbol_name("_DIP_4")
	.dwattr $C$DW$38, DW_AT_type(*$C$DW$T$55)
	.dwattr $C$DW$38, DW_AT_location[DW_OP_breg31 7]
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 532,column 3,is_stmt
$C$DW$39	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$39, DW_AT_low_pc(0x00)
	.dwattr $C$DW$39, DW_AT_name("_GPIO_getInput")
	.dwattr $C$DW$39, DW_AT_TI_call

           CALLP   .S2     _GPIO_getInput,B3
||         ADD     .L1X    7,SP,A6           ; |532| 
||         ZERO    .S1     A4                ; |532| 
||         MVK     .L2     0x4,B4            ; |532| 

$C$RL0:    ; CALL OCCURS {_GPIO_getInput} {0}  ; |532| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 533,column 3,is_stmt
$C$DW$40	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$40, DW_AT_low_pc(0x00)
	.dwattr $C$DW$40, DW_AT_name("_GPIO_getInput")
	.dwattr $C$DW$40, DW_AT_TI_call

           CALLP   .S2     _GPIO_getInput,B3
||         ZERO    .L1     A4                ; |533| 
||         MVK     .L2     0x3,B4            ; |533| 
||         ADD     .S1X    6,SP,A6           ; |533| 

$C$RL1:    ; CALL OCCURS {_GPIO_getInput} {0}  ; |533| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 534,column 3,is_stmt
$C$DW$41	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$41, DW_AT_low_pc(0x00)
	.dwattr $C$DW$41, DW_AT_name("_GPIO_getInput")
	.dwattr $C$DW$41, DW_AT_TI_call

           CALLP   .S2     _GPIO_getInput,B3
||         ZERO    .L1     A4                ; |534| 
||         MVK     .L2     0x2,B4            ; |534| 
||         ADD     .S1X    5,SP,A6           ; |534| 

$C$RL2:    ; CALL OCCURS {_GPIO_getInput} {0}  ; |534| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 535,column 3,is_stmt
$C$DW$42	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$42, DW_AT_low_pc(0x00)
	.dwattr $C$DW$42, DW_AT_name("_GPIO_getInput")
	.dwattr $C$DW$42, DW_AT_TI_call

           CALLP   .S2     _GPIO_getInput,B3
||         ZERO    .L1     A4                ; |535| 
||         MVK     .L2     0x1,B4            ; |535| 
||         ADD     .S1X    4,SP,A6           ; |535| 

$C$RL3:    ; CALL OCCURS {_GPIO_getInput} {0}  ; |535| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 536,column 3,is_stmt
           LDBU    .D2T1   *+SP(7),A3        ; |536| 
           LDBU    .D2T1   *+SP(6),A6        ; |536| 
           LDBU    .D2T1   *+SP(5),A5        ; |536| 
           LDBU    .D2T1   *+SP(4),A4        ; |536| 
           NOP             2
           ADDAH   .D1     A6,A3,A3          ; |536| 
           ADDAH   .D1     A5,A3,A3          ; |536| 
           ADDAH   .D1     A4,A3,A3          ; |536| 
           EXTU    .S1     A3,24,24,A4       ; |536| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 537,column 1,is_stmt
           LDW     .D2T2   *++SP(8),B3       ; |537| 
           NOP             4
	.dwcfi	cfa_offset, 0
	.dwcfi	restore_reg, 19
	.dwcfi	cfa_offset, 0
$C$DW$43	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$43, DW_AT_low_pc(0x00)
	.dwattr $C$DW$43, DW_AT_TI_return
           RETNOP  .S2     B3,5              ; |537| 
           ; BRANCH OCCURS {B3}              ; |537| 
	.dwattr $C$DW$34, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$34, DW_AT_TI_end_line(0x219)
	.dwattr $C$DW$34, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$34

	.sect	".text"
	.clink
	.global	_rand31_next

$C$DW$44	.dwtag  DW_TAG_subprogram, DW_AT_name("rand31_next")
	.dwattr $C$DW$44, DW_AT_low_pc(_rand31_next)
	.dwattr $C$DW$44, DW_AT_high_pc(0x00)
	.dwattr $C$DW$44, DW_AT_TI_symbol_name("_rand31_next")
	.dwattr $C$DW$44, DW_AT_external
	.dwattr $C$DW$44, DW_AT_type(*$C$DW$T$19)
	.dwattr $C$DW$44, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$44, DW_AT_TI_begin_line(0x2b0)
	.dwattr $C$DW$44, DW_AT_TI_begin_column(0x0a)
	.dwattr $C$DW$44, DW_AT_TI_max_frame_size(0x00)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 689,column 1,is_stmt,address _rand31_next

	.dwfde $C$DW$CIE, _rand31_next

;******************************************************************************
;* FUNCTION NAME: rand31_next                                                 *
;*                                                                            *
;*   Regs Modified     : A0,A3,A4,B4,B5,B6                                    *
;*   Regs Used         : A0,A3,A4,B3,B4,B5,B6,DP                              *
;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_rand31_next:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
$C$DW$45	.dwtag  DW_TAG_variable, DW_AT_name("lo")
	.dwattr $C$DW$45, DW_AT_TI_symbol_name("_lo")
	.dwattr $C$DW$45, DW_AT_type(*$C$DW$T$19)
	.dwattr $C$DW$45, DW_AT_location[DW_OP_reg4]
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 695,column 3,is_stmt
           LDW     .D2T2   *+DP(_prand_seed),B4 ; |695| 
           MVK     .S2     16807,B5          ; |695| 
           MVK     .S1     16807,A3          ; |695| 
           NOP             2
           MPYHLU  .M2     B4,B5,B5          ; |695| 
           MPYU    .M1X    B4,A3,A4          ; |695| 
           EXTU    .S2     B5,17,1,B6        ; |695| 
           SHRU    .S2     B5,15,B5          ; |695| 
           ADD     .L2     B6,B5,B4          ; |695| 
           ZERO    .L1     A3

           ADD     .L1X    A4,B4,A4          ; |695| 
||         SET     .S1     A3,0x0,0x1e,A3

           CMPGTU  .L1     A4,A3,A0          ; |695| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 698,column 24,is_stmt
   [ A0]   SUB     .L1     A4,A3,A4          ; |698| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 700,column 3,is_stmt
           STW     .D2T1   A4,*+DP(_prand_seed) ; |700| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 701,column 1,is_stmt
	.dwcfi	cfa_offset, 0
$C$DW$46	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$46, DW_AT_low_pc(0x00)
	.dwattr $C$DW$46, DW_AT_TI_return
           RETNOP  .S2     B3,5              ; |701| 
           ; BRANCH OCCURS {B3}              ; |701| 
	.dwattr $C$DW$44, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$44, DW_AT_TI_end_line(0x2bd)
	.dwattr $C$DW$44, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$44

	.sect	".text"
	.clink
	.global	_prbs

$C$DW$47	.dwtag  DW_TAG_subprogram, DW_AT_name("prbs")
	.dwattr $C$DW$47, DW_AT_low_pc(_prbs)
	.dwattr $C$DW$47, DW_AT_high_pc(0x00)
	.dwattr $C$DW$47, DW_AT_TI_symbol_name("_prbs")
	.dwattr $C$DW$47, DW_AT_external
	.dwattr $C$DW$47, DW_AT_type(*$C$DW$T$10)
	.dwattr $C$DW$47, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$47, DW_AT_TI_begin_line(0x2a0)
	.dwattr $C$DW$47, DW_AT_TI_begin_column(0x05)
	.dwattr $C$DW$47, DW_AT_TI_max_frame_size(0x00)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 673,column 1,is_stmt,address _prbs

	.dwfde $C$DW$CIE, _prbs

;******************************************************************************
;* FUNCTION NAME: prbs                                                        *
;*                                                                            *
;*   Regs Modified     : A0,A3,A4,A5,B4,B5                                    *
;*   Regs Used         : A0,A3,A4,A5,B3,B4,B5,DP                              *
;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_prbs:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
$C$DW$48	.dwtag  DW_TAG_variable, DW_AT_name("prnseq")
	.dwattr $C$DW$48, DW_AT_TI_symbol_name("_prnseq")
	.dwattr $C$DW$48, DW_AT_type(*$C$DW$T$10)
	.dwattr $C$DW$48, DW_AT_location[DW_OP_reg20]
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 675,column 3,is_stmt
           MVKL    .S1     _sreg,A4
           MVKH    .S1     _sreg,A4
           LDW     .D1T1   *A4,A3            ; |675| 
           NOP             4
           AND     .L1     1,A3,A0           ; |675| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 678,column 2,is_stmt
   [!A0]   MVK     .S2     0x1f40,B4         ; |678| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 676,column 2,is_stmt
   [ A0]   MVK     .S2     0xffffe0c0,B4     ; |676| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 679,column 3,is_stmt
           SHRU    .S1     A3,11,A5          ; |679| 
           SHRU    .S2X    A3,13,B5          ; |679| 
           XOR     .L2X    B5,A5,B5          ; |679| 

           AND     .L2     1,B5,B5           ; |679| 
||         EXTU    .S1     A3,30,31,A5       ; |679| 

           XOR     .L2X    A0,B5,B5          ; |679| 
           XOR     .L2X    A5,B5,B5          ; |679| 
           STW     .D2T2   B5,*+DP(_fb)      ; |679| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 682,column 3,is_stmt
           AND     .L2     1,B5,B5           ; |682| 
           ADD     .L1     A3,A3,A3          ; |682| 
           OR      .L1X    B5,A3,A3          ; |682| 
           STW     .D1T1   A3,*A4            ; |682| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 683,column 3,is_stmt
           MV      .L1X    B4,A4             ; |683| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 684,column 1,is_stmt
	.dwcfi	cfa_offset, 0
$C$DW$49	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$49, DW_AT_low_pc(0x00)
	.dwattr $C$DW$49, DW_AT_TI_return
           RETNOP  .S2     B3,5              ; |684| 
           ; BRANCH OCCURS {B3}              ; |684| 
	.dwattr $C$DW$47, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$47, DW_AT_TI_end_line(0x2ac)
	.dwattr $C$DW$47, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$47

	.sect	".text"
	.clink
	.global	_prand

$C$DW$50	.dwtag  DW_TAG_subprogram, DW_AT_name("prand")
	.dwattr $C$DW$50, DW_AT_low_pc(_prand)
	.dwattr $C$DW$50, DW_AT_high_pc(0x00)
	.dwattr $C$DW$50, DW_AT_TI_symbol_name("_prand")
	.dwattr $C$DW$50, DW_AT_external
	.dwattr $C$DW$50, DW_AT_type(*$C$DW$T$62)
	.dwattr $C$DW$50, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$50, DW_AT_TI_begin_line(0x2bf)
	.dwattr $C$DW$50, DW_AT_TI_begin_column(0x09)
	.dwattr $C$DW$50, DW_AT_TI_max_frame_size(0x00)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 704,column 1,is_stmt,address _prand

	.dwfde $C$DW$CIE, _prand

;******************************************************************************
;* FUNCTION NAME: prand                                                       *
;*                                                                            *
;*   Regs Modified     : A0,A3,A4,B4,B5,B6                                    *
;*   Regs Used         : A0,A3,A4,B3,B4,B5,B6,DP                              *
;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_prand:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
$C$DW$51	.dwtag  DW_TAG_variable, DW_AT_name("lo")
	.dwattr $C$DW$51, DW_AT_TI_symbol_name("_lo")
	.dwattr $C$DW$51, DW_AT_type(*$C$DW$T$19)
	.dwattr $C$DW$51, DW_AT_location[DW_OP_reg3]
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 695,column 3,is_stmt
           LDW     .D2T2   *+DP(_prand_seed),B5 ; |695| 
           MVK     .S2     16807,B4          ; |695| 
           MVK     .S1     16807,A3          ; |695| 
           ZERO    .L1     A4
           SET     .S1     A4,0x0,0x1e,A4
           MPYHLU  .M2     B5,B4,B4          ; |695| 
           MPYU    .M1X    B5,A3,A3          ; |695| 
           EXTU    .S2     B4,17,1,B6        ; |695| 
           SHRU    .S2     B4,15,B4          ; |695| 
           ADD     .L2     B6,B4,B4          ; |695| 
           NOP             1
           ADD     .L1X    A3,B4,A3          ; |695| 
           CMPGTU  .L1     A3,A4,A0          ; |695| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 698,column 24,is_stmt
   [ A0]   SUB     .L1     A3,A4,A3          ; |698| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 700,column 3,is_stmt
           STW     .D2T1   A3,*+DP(_prand_seed) ; |700| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 705,column 1,is_stmt
           SHRU    .S1     A3,18,A3          ; |705| 
           ADDK    .S1     -4096,A3          ; |705| 
           EXT     .S1     A3,16,16,A4       ; |705| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 706,column 1,is_stmt
	.dwcfi	cfa_offset, 0
$C$DW$52	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$52, DW_AT_low_pc(0x00)
	.dwattr $C$DW$52, DW_AT_TI_return
           RETNOP  .S2     B3,5              ; |706| 
           ; BRANCH OCCURS {B3}              ; |706| 
	.dwattr $C$DW$50, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$50, DW_AT_TI_end_line(0x2c2)
	.dwattr $C$DW$50, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$50

	.sect	".text"
	.clink
	.global	_output_sample

$C$DW$53	.dwtag  DW_TAG_subprogram, DW_AT_name("output_sample")
	.dwattr $C$DW$53, DW_AT_low_pc(_output_sample)
	.dwattr $C$DW$53, DW_AT_high_pc(0x00)
	.dwattr $C$DW$53, DW_AT_TI_symbol_name("_output_sample")
	.dwattr $C$DW$53, DW_AT_external
	.dwattr $C$DW$53, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$53, DW_AT_TI_begin_line(0x1d)
	.dwattr $C$DW$53, DW_AT_TI_begin_column(0x06)
	.dwattr $C$DW$53, DW_AT_TI_max_frame_size(0x00)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 30,column 1,is_stmt,address _output_sample

	.dwfde $C$DW$CIE, _output_sample
$C$DW$54	.dwtag  DW_TAG_formal_parameter, DW_AT_name("out_data")
	.dwattr $C$DW$54, DW_AT_TI_symbol_name("_out_data")
	.dwattr $C$DW$54, DW_AT_type(*$C$DW$T$60)
	.dwattr $C$DW$54, DW_AT_location[DW_OP_reg4]

;******************************************************************************
;* FUNCTION NAME: output_sample                                               *
;*                                                                            *
;*   Regs Modified     : A0,A3,A4,A5,A6,B0                                    *
;*   Regs Used         : A0,A3,A4,A5,A6,B0,B3,DP                              *
;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_output_sample:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
$C$DW$55	.dwtag  DW_TAG_variable, DW_AT_name("out_data")
	.dwattr $C$DW$55, DW_AT_TI_symbol_name("_out_data")
	.dwattr $C$DW$55, DW_AT_type(*$C$DW$T$86)
	.dwattr $C$DW$55, DW_AT_location[DW_OP_reg4]
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 31,column 3,is_stmt
           MVKL    .S1     _AIC31_data,A6
           MVKH    .S1     _AIC31_data,A6
           STW     .D1T1   A4,*A6            ; |31| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 32,column 3,is_stmt
           LDW     .D2T2   *+DP(_poll),B0    ; |32| 
           NOP             4
   [!B0]   BNOP    .S1     $C$L4,5           ; |32| 
           ; BRANCHCC OCCURS {$C$L4}         ; |32| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 32,column 20,is_stmt
           MVKL    .S1     0x1d001b4,A4
           MVKH    .S1     0x1d001b4,A4
           LDW     .D1T1   *A4,A3            ; |32| 
           NOP             4
           EXTU    .S1     A3,27,31,A0       ; |32| 

   [ A0]   BNOP    .S1     $C$L4,5           ; |32| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L4}         ; |32| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 32
;*      Loop closing brace source line   : 32
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     1*       0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          1        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             1*       0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L1:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L2:    ; PIPED LOOP KERNEL
$C$DW$L$_output_sample$4$B:
           NOP             2
           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |32| (P) <0,3>  ^ 
           NOP             4
           EXTU    .S1     A3,27,31,A0       ; |32| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |32| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_output_sample$4$E:
;** --------------------------------------------------------------------------*
$C$L3:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L4:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 33,column 3,is_stmt
           LDW     .D1T1   *A6,A4            ; |33| 
           MVKL    .S1     0x1d00234,A3
           MVKH    .S1     0x1d00234,A3
           NOP             2
           STW     .D1T1   A4,*A3            ; |33| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 34,column 1,is_stmt
	.dwcfi	cfa_offset, 0
$C$DW$56	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$56, DW_AT_low_pc(0x00)
	.dwattr $C$DW$56, DW_AT_TI_return
           RETNOP  .S2     B3,5              ; |34| 
           ; BRANCH OCCURS {B3}              ; |34| 

$C$DW$57	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$57, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L2:1:1589536273")
	.dwattr $C$DW$57, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$57, DW_AT_TI_begin_line(0x20)
	.dwattr $C$DW$57, DW_AT_TI_end_line(0x20)
$C$DW$58	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$58, DW_AT_low_pc($C$DW$L$_output_sample$4$B)
	.dwattr $C$DW$58, DW_AT_high_pc($C$DW$L$_output_sample$4$E)
	.dwendtag $C$DW$57

	.dwattr $C$DW$53, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$53, DW_AT_TI_end_line(0x22)
	.dwattr $C$DW$53, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$53

	.sect	".text"
	.clink
	.global	_output_right_sample

$C$DW$59	.dwtag  DW_TAG_subprogram, DW_AT_name("output_right_sample")
	.dwattr $C$DW$59, DW_AT_low_pc(_output_right_sample)
	.dwattr $C$DW$59, DW_AT_high_pc(0x00)
	.dwattr $C$DW$59, DW_AT_TI_symbol_name("_output_right_sample")
	.dwattr $C$DW$59, DW_AT_external
	.dwattr $C$DW$59, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$59, DW_AT_TI_begin_line(0x2c)
	.dwattr $C$DW$59, DW_AT_TI_begin_column(0x06)
	.dwattr $C$DW$59, DW_AT_TI_max_frame_size(0x00)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 45,column 1,is_stmt,address _output_right_sample

	.dwfde $C$DW$CIE, _output_right_sample
$C$DW$60	.dwtag  DW_TAG_formal_parameter, DW_AT_name("out_data")
	.dwattr $C$DW$60, DW_AT_TI_symbol_name("_out_data")
	.dwattr $C$DW$60, DW_AT_type(*$C$DW$T$62)
	.dwattr $C$DW$60, DW_AT_location[DW_OP_reg4]

;******************************************************************************
;* FUNCTION NAME: output_right_sample                                         *
;*                                                                            *
;*   Regs Modified     : A0,A3,A4,A5,A6,B0                                    *
;*   Regs Used         : A0,A3,A4,A5,A6,B0,B3,DP                              *
;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_output_right_sample:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
$C$DW$61	.dwtag  DW_TAG_variable, DW_AT_name("out_data")
	.dwattr $C$DW$61, DW_AT_TI_symbol_name("_out_data")
	.dwattr $C$DW$61, DW_AT_type(*$C$DW$T$82)
	.dwattr $C$DW$61, DW_AT_location[DW_OP_reg4]
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 46,column 3,is_stmt

           MVKL    .S1     _AIC31_data,A6
||         ZERO    .L1     A3                ; |46| 

           MVKH    .S1     _AIC31_data,A6
           STW     .D1T1   A3,*A6            ; |46| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 47,column 3,is_stmt
           STH     .D1T1   A4,*A6            ; |47| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 48,column 3,is_stmt
           LDW     .D2T2   *+DP(_poll),B0    ; |48| 
           NOP             4
   [!B0]   BNOP    .S1     $C$L8,5           ; |48| 
           ; BRANCHCC OCCURS {$C$L8}         ; |48| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 48,column 20,is_stmt
           MVKL    .S1     0x1d001b4,A4
           MVKH    .S1     0x1d001b4,A4
           LDW     .D1T1   *A4,A3            ; |48| 
           NOP             4
           EXTU    .S1     A3,27,31,A0       ; |48| 

   [ A0]   BNOP    .S1     $C$L8,5           ; |48| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L8}         ; |48| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 48
;*      Loop closing brace source line   : 48
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     1*       0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          1        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             1*       0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L5:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L6:    ; PIPED LOOP KERNEL
$C$DW$L$_output_right_sample$4$B:
           NOP             2
           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |48| (P) <0,3>  ^ 
           NOP             4
           EXTU    .S1     A3,27,31,A0       ; |48| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |48| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_output_right_sample$4$E:
;** --------------------------------------------------------------------------*
$C$L7:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L8:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 49,column 3,is_stmt
           LDW     .D1T1   *A6,A4            ; |49| 
           MVKL    .S1     0x1d00234,A3
           MVKH    .S1     0x1d00234,A3
           NOP             2
           STW     .D1T1   A4,*A3            ; |49| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 50,column 1,is_stmt
	.dwcfi	cfa_offset, 0
$C$DW$62	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$62, DW_AT_low_pc(0x00)
	.dwattr $C$DW$62, DW_AT_TI_return
           RETNOP  .S2     B3,5              ; |50| 
           ; BRANCH OCCURS {B3}              ; |50| 

$C$DW$63	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$63, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L6:1:1589536273")
	.dwattr $C$DW$63, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$63, DW_AT_TI_begin_line(0x30)
	.dwattr $C$DW$63, DW_AT_TI_end_line(0x30)
$C$DW$64	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$64, DW_AT_low_pc($C$DW$L$_output_right_sample$4$B)
	.dwattr $C$DW$64, DW_AT_high_pc($C$DW$L$_output_right_sample$4$E)
	.dwendtag $C$DW$63

	.dwattr $C$DW$59, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$59, DW_AT_TI_end_line(0x32)
	.dwattr $C$DW$59, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$59

	.sect	".text"
	.clink
	.global	_output_left_sample

$C$DW$65	.dwtag  DW_TAG_subprogram, DW_AT_name("output_left_sample")
	.dwattr $C$DW$65, DW_AT_low_pc(_output_left_sample)
	.dwattr $C$DW$65, DW_AT_high_pc(0x00)
	.dwattr $C$DW$65, DW_AT_TI_symbol_name("_output_left_sample")
	.dwattr $C$DW$65, DW_AT_external
	.dwattr $C$DW$65, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$65, DW_AT_TI_begin_line(0x24)
	.dwattr $C$DW$65, DW_AT_TI_begin_column(0x06)
	.dwattr $C$DW$65, DW_AT_TI_max_frame_size(0x00)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 37,column 1,is_stmt,address _output_left_sample

	.dwfde $C$DW$CIE, _output_left_sample
$C$DW$66	.dwtag  DW_TAG_formal_parameter, DW_AT_name("out_data")
	.dwattr $C$DW$66, DW_AT_TI_symbol_name("_out_data")
	.dwattr $C$DW$66, DW_AT_type(*$C$DW$T$62)
	.dwattr $C$DW$66, DW_AT_location[DW_OP_reg4]

;******************************************************************************
;* FUNCTION NAME: output_left_sample                                          *
;*                                                                            *
;*   Regs Modified     : A0,A3,A4,A5,A6,B0                                    *
;*   Regs Used         : A0,A3,A4,A5,A6,B0,B3,DP                              *
;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_output_left_sample:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
$C$DW$67	.dwtag  DW_TAG_variable, DW_AT_name("out_data")
	.dwattr $C$DW$67, DW_AT_TI_symbol_name("_out_data")
	.dwattr $C$DW$67, DW_AT_type(*$C$DW$T$82)
	.dwattr $C$DW$67, DW_AT_location[DW_OP_reg4]
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 38,column 3,is_stmt

           MVKL    .S1     _AIC31_data,A6
||         ZERO    .L1     A3                ; |38| 

           MVKH    .S1     _AIC31_data,A6
           STW     .D1T1   A3,*A6            ; |38| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 39,column 3,is_stmt
           STH     .D1T1   A4,*+A6(2)        ; |39| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 40,column 3,is_stmt
           LDW     .D2T2   *+DP(_poll),B0    ; |40| 
           NOP             4
   [!B0]   BNOP    .S1     $C$L12,5          ; |40| 
           ; BRANCHCC OCCURS {$C$L12}        ; |40| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 40,column 20,is_stmt
           MVKL    .S1     0x1d001b4,A4
           MVKH    .S1     0x1d001b4,A4
           LDW     .D1T1   *A4,A3            ; |40| 
           NOP             4
           EXTU    .S1     A3,27,31,A0       ; |40| 

   [ A0]   BNOP    .S1     $C$L12,5          ; |40| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L12}        ; |40| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 40
;*      Loop closing brace source line   : 40
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     1*       0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          1        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             1*       0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L9:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L10:    ; PIPED LOOP KERNEL
$C$DW$L$_output_left_sample$4$B:
           NOP             2
           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |40| (P) <0,3>  ^ 
           NOP             4
           EXTU    .S1     A3,27,31,A0       ; |40| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |40| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_output_left_sample$4$E:
;** --------------------------------------------------------------------------*
$C$L11:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L12:    
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 41,column 3,is_stmt
           MV      .L1     A6,A3
           LDW     .D1T1   *A3,A4            ; |41| 
           MVKL    .S1     0x1d00234,A3
           MVKH    .S1     0x1d00234,A3
           NOP             2
           STW     .D1T1   A4,*A3            ; |41| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 42,column 1,is_stmt
	.dwcfi	cfa_offset, 0
$C$DW$68	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$68, DW_AT_low_pc(0x00)
	.dwattr $C$DW$68, DW_AT_TI_return
           RETNOP  .S2     B3,5              ; |42| 
           ; BRANCH OCCURS {B3}              ; |42| 

$C$DW$69	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$69, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L10:1:1589536273")
	.dwattr $C$DW$69, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$69, DW_AT_TI_begin_line(0x28)
	.dwattr $C$DW$69, DW_AT_TI_end_line(0x28)
$C$DW$70	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$70, DW_AT_low_pc($C$DW$L$_output_left_sample$4$B)
	.dwattr $C$DW$70, DW_AT_high_pc($C$DW$L$_output_left_sample$4$E)
	.dwendtag $C$DW$69

	.dwattr $C$DW$65, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$65, DW_AT_TI_end_line(0x2a)
	.dwattr $C$DW$65, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$65

	.sect	".text"
	.clink
	.global	_input_sample

$C$DW$71	.dwtag  DW_TAG_subprogram, DW_AT_name("input_sample")
	.dwattr $C$DW$71, DW_AT_low_pc(_input_sample)
	.dwattr $C$DW$71, DW_AT_high_pc(0x00)
	.dwattr $C$DW$71, DW_AT_TI_symbol_name("_input_sample")
	.dwattr $C$DW$71, DW_AT_external
	.dwattr $C$DW$71, DW_AT_type(*$C$DW$T$60)
	.dwattr $C$DW$71, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$71, DW_AT_TI_begin_line(0x34)
	.dwattr $C$DW$71, DW_AT_TI_begin_column(0x09)
	.dwattr $C$DW$71, DW_AT_TI_max_frame_size(0x00)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 53,column 1,is_stmt,address _input_sample

	.dwfde $C$DW$CIE, _input_sample

;******************************************************************************
;* FUNCTION NAME: input_sample                                                *
;*                                                                            *
;*   Regs Modified     : A0,A3,A4,A5,A6,B0,B4                                 *
;*   Regs Used         : A0,A3,A4,A5,A6,B0,B3,B4,DP                           *
;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_input_sample:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 54,column 3,is_stmt
           LDW     .D2T2   *+DP(_poll),B0    ; |54| 
           NOP             4
   [!B0]   BNOP    .S1     $C$L16,5          ; |54| 
           ; BRANCHCC OCCURS {$C$L16}        ; |54| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 54,column 20,is_stmt
           MVKL    .S1     0x1d001b8,A4
           MVKH    .S1     0x1d001b8,A4
           LDW     .D1T1   *A4,A3            ; |54| 
           MVK     .S2     0x20,B4           ; |54| 
           NOP             3
           EXTU    .S1     A3,26,31,A0       ; |54| 

   [ A0]   BNOP    .S1     $C$L16,5          ; |54| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L16}        ; |54| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 54
;*      Loop closing brace source line   : 54
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L13:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L14:    ; PIPED LOOP KERNEL
$C$DW$L$_input_sample$4$B:
           NOP             2
           MV      .L1     A4,A6             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A6,A3            ; |54| (P) <0,3>  ^ 
           NOP             2

           SPMASK          L1
||         MV      .L1X    B4,A5

           NOP             1
           AND     .L1     A5,A3,A0          ; |54| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |54| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_input_sample$4$E:
;** --------------------------------------------------------------------------*
$C$L15:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L16:    
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 55,column 3,is_stmt
           MVKL    .S1     0x1d00238,A3
           MVKH    .S1     0x1d00238,A3
           LDW     .D1T1   *A3,A4            ; |55| 
           MVKL    .S2     _AIC31_data,B4
           MVKH    .S2     _AIC31_data,B4
           NOP             2
           STW     .D2T1   A4,*B4            ; |55| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 56,column 3,is_stmt
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 57,column 1,is_stmt
	.dwcfi	cfa_offset, 0
$C$DW$72	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$72, DW_AT_low_pc(0x00)
	.dwattr $C$DW$72, DW_AT_TI_return
           RETNOP  .S2     B3,5              ; |57| 
           ; BRANCH OCCURS {B3}              ; |57| 

$C$DW$73	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$73, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L14:1:1589536273")
	.dwattr $C$DW$73, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$73, DW_AT_TI_begin_line(0x36)
	.dwattr $C$DW$73, DW_AT_TI_end_line(0x36)
$C$DW$74	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$74, DW_AT_low_pc($C$DW$L$_input_sample$4$B)
	.dwattr $C$DW$74, DW_AT_high_pc($C$DW$L$_input_sample$4$E)
	.dwendtag $C$DW$73

	.dwattr $C$DW$71, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$71, DW_AT_TI_end_line(0x39)
	.dwattr $C$DW$71, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$71

	.sect	".text"
	.clink
	.global	_input_right_sample

$C$DW$75	.dwtag  DW_TAG_subprogram, DW_AT_name("input_right_sample")
	.dwattr $C$DW$75, DW_AT_low_pc(_input_right_sample)
	.dwattr $C$DW$75, DW_AT_high_pc(0x00)
	.dwattr $C$DW$75, DW_AT_TI_symbol_name("_input_right_sample")
	.dwattr $C$DW$75, DW_AT_external
	.dwattr $C$DW$75, DW_AT_type(*$C$DW$T$62)
	.dwattr $C$DW$75, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$75, DW_AT_TI_begin_line(0x42)
	.dwattr $C$DW$75, DW_AT_TI_begin_column(0x09)
	.dwattr $C$DW$75, DW_AT_TI_max_frame_size(0x00)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 67,column 1,is_stmt,address _input_right_sample

	.dwfde $C$DW$CIE, _input_right_sample

;******************************************************************************
;* FUNCTION NAME: input_right_sample                                          *
;*                                                                            *
;*   Regs Modified     : A0,A3,A4,A5,A6,B0,B4                                 *
;*   Regs Used         : A0,A3,A4,A5,A6,B0,B3,B4,DP                           *
;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_input_right_sample:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 68,column 3,is_stmt
           LDW     .D2T2   *+DP(_poll),B0    ; |68| 
           NOP             4
   [!B0]   BNOP    .S1     $C$L20,5          ; |68| 
           ; BRANCHCC OCCURS {$C$L20}        ; |68| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 68,column 20,is_stmt
           MVKL    .S1     0x1d001b8,A4
           MVKH    .S1     0x1d001b8,A4
           LDW     .D1T1   *A4,A3            ; |68| 
           MVK     .S2     0x20,B4           ; |68| 
           NOP             3
           EXTU    .S1     A3,26,31,A0       ; |68| 

   [ A0]   BNOP    .S1     $C$L20,5          ; |68| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L20}        ; |68| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 68
;*      Loop closing brace source line   : 68
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L17:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L18:    ; PIPED LOOP KERNEL
$C$DW$L$_input_right_sample$4$B:
           NOP             2
           MV      .L1     A4,A6             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A6,A3            ; |68| (P) <0,3>  ^ 
           NOP             2

           SPMASK          L1
||         MV      .L1X    B4,A5

           NOP             1
           AND     .L1     A5,A3,A0          ; |68| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |68| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_input_right_sample$4$E:
;** --------------------------------------------------------------------------*
$C$L19:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L20:    
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 69,column 3,is_stmt
           MVKL    .S1     0x1d00238,A3
           MVKH    .S1     0x1d00238,A3
           LDW     .D1T1   *A3,A3            ; |69| 
           MVKL    .S2     _AIC31_data,B4
           MVKH    .S2     _AIC31_data,B4
           NOP             2
           STW     .D2T1   A3,*B4            ; |69| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 70,column 3,is_stmt
           LDH     .D2T1   *B4,A4            ; |70| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 71,column 1,is_stmt
	.dwcfi	cfa_offset, 0
$C$DW$76	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$76, DW_AT_low_pc(0x00)
	.dwattr $C$DW$76, DW_AT_TI_return
           RETNOP  .S2     B3,5              ; |71| 
           ; BRANCH OCCURS {B3}              ; |71| 

$C$DW$77	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$77, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L18:1:1589536273")
	.dwattr $C$DW$77, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$77, DW_AT_TI_begin_line(0x44)
	.dwattr $C$DW$77, DW_AT_TI_end_line(0x44)
$C$DW$78	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$78, DW_AT_low_pc($C$DW$L$_input_right_sample$4$B)
	.dwattr $C$DW$78, DW_AT_high_pc($C$DW$L$_input_right_sample$4$E)
	.dwendtag $C$DW$77

	.dwattr $C$DW$75, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$75, DW_AT_TI_end_line(0x47)
	.dwattr $C$DW$75, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$75

	.sect	".text"
	.clink
	.global	_input_left_sample

$C$DW$79	.dwtag  DW_TAG_subprogram, DW_AT_name("input_left_sample")
	.dwattr $C$DW$79, DW_AT_low_pc(_input_left_sample)
	.dwattr $C$DW$79, DW_AT_high_pc(0x00)
	.dwattr $C$DW$79, DW_AT_TI_symbol_name("_input_left_sample")
	.dwattr $C$DW$79, DW_AT_external
	.dwattr $C$DW$79, DW_AT_type(*$C$DW$T$62)
	.dwattr $C$DW$79, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$79, DW_AT_TI_begin_line(0x3b)
	.dwattr $C$DW$79, DW_AT_TI_begin_column(0x09)
	.dwattr $C$DW$79, DW_AT_TI_max_frame_size(0x00)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 60,column 1,is_stmt,address _input_left_sample

	.dwfde $C$DW$CIE, _input_left_sample

;******************************************************************************
;* FUNCTION NAME: input_left_sample                                           *
;*                                                                            *
;*   Regs Modified     : A0,A3,A4,A5,A6,B0,B4                                 *
;*   Regs Used         : A0,A3,A4,A5,A6,B0,B3,B4,DP                           *
;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_input_left_sample:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 61,column 3,is_stmt
           LDW     .D2T2   *+DP(_poll),B0    ; |61| 
           NOP             4
   [!B0]   BNOP    .S1     $C$L24,5          ; |61| 
           ; BRANCHCC OCCURS {$C$L24}        ; |61| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 61,column 20,is_stmt
           MVKL    .S1     0x1d001b8,A4
           MVKH    .S1     0x1d001b8,A4
           LDW     .D1T1   *A4,A3            ; |61| 
           MVK     .S2     0x20,B4           ; |61| 
           NOP             3
           EXTU    .S1     A3,26,31,A0       ; |61| 

   [ A0]   BNOP    .S1     $C$L24,5          ; |61| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L24}        ; |61| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 61
;*      Loop closing brace source line   : 61
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L21:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L22:    ; PIPED LOOP KERNEL
$C$DW$L$_input_left_sample$4$B:
           NOP             2
           MV      .L1     A4,A6             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A6,A3            ; |61| (P) <0,3>  ^ 
           NOP             2

           SPMASK          L1
||         MV      .L1X    B4,A5

           NOP             1
           AND     .L1     A5,A3,A0          ; |61| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |61| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_input_left_sample$4$E:
;** --------------------------------------------------------------------------*
$C$L23:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L24:    
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 62,column 3,is_stmt
           MVKL    .S1     0x1d00238,A3
           MVKH    .S1     0x1d00238,A3
           LDW     .D1T1   *A3,A3            ; |62| 
           MVKL    .S2     _AIC31_data,B4
           MVKH    .S2     _AIC31_data,B4
           NOP             2
           STW     .D2T1   A3,*B4            ; |62| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 63,column 3,is_stmt
           LDH     .D2T1   *+B4(2),A4        ; |63| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 64,column 1,is_stmt
	.dwcfi	cfa_offset, 0
$C$DW$80	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$80, DW_AT_low_pc(0x00)
	.dwattr $C$DW$80, DW_AT_TI_return
           RETNOP  .S2     B3,5              ; |64| 
           ; BRANCH OCCURS {B3}              ; |64| 

$C$DW$81	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$81, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L22:1:1589536273")
	.dwattr $C$DW$81, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$81, DW_AT_TI_begin_line(0x3d)
	.dwattr $C$DW$81, DW_AT_TI_end_line(0x3d)
$C$DW$82	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$82, DW_AT_low_pc($C$DW$L$_input_left_sample$4$B)
	.dwattr $C$DW$82, DW_AT_high_pc($C$DW$L$_input_left_sample$4$E)
	.dwendtag $C$DW$81

	.dwattr $C$DW$79, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$79, DW_AT_TI_end_line(0x40)
	.dwattr $C$DW$79, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$79

	.sect	".text"
	.clink
	.global	_L138_init_aic3106_registers

$C$DW$83	.dwtag  DW_TAG_subprogram, DW_AT_name("L138_init_aic3106_registers")
	.dwattr $C$DW$83, DW_AT_low_pc(_L138_init_aic3106_registers)
	.dwattr $C$DW$83, DW_AT_high_pc(0x00)
	.dwattr $C$DW$83, DW_AT_TI_symbol_name("_L138_init_aic3106_registers")
	.dwattr $C$DW$83, DW_AT_external
	.dwattr $C$DW$83, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$83, DW_AT_TI_begin_line(0x1a0)
	.dwattr $C$DW$83, DW_AT_TI_begin_column(0x06)
	.dwattr $C$DW$83, DW_AT_TI_max_frame_size(0x20)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 417,column 1,is_stmt,address _L138_init_aic3106_registers

	.dwfde $C$DW$CIE, _L138_init_aic3106_registers
$C$DW$84	.dwtag  DW_TAG_formal_parameter, DW_AT_name("fs")
	.dwattr $C$DW$84, DW_AT_TI_symbol_name("_fs")
	.dwattr $C$DW$84, DW_AT_type(*$C$DW$T$60)
	.dwattr $C$DW$84, DW_AT_location[DW_OP_reg4]
$C$DW$85	.dwtag  DW_TAG_formal_parameter, DW_AT_name("adc_gain")
	.dwattr $C$DW$85, DW_AT_TI_symbol_name("_adc_gain")
	.dwattr $C$DW$85, DW_AT_type(*$C$DW$T$62)
	.dwattr $C$DW$85, DW_AT_location[DW_OP_reg20]
$C$DW$86	.dwtag  DW_TAG_formal_parameter, DW_AT_name("dac_atten")
	.dwattr $C$DW$86, DW_AT_TI_symbol_name("_dac_atten")
	.dwattr $C$DW$86, DW_AT_type(*$C$DW$T$62)
	.dwattr $C$DW$86, DW_AT_location[DW_OP_reg6]
$C$DW$87	.dwtag  DW_TAG_formal_parameter, DW_AT_name("input_type")
	.dwattr $C$DW$87, DW_AT_TI_symbol_name("_input_type")
	.dwattr $C$DW$87, DW_AT_type(*$C$DW$T$66)
	.dwattr $C$DW$87, DW_AT_location[DW_OP_reg22]

;******************************************************************************
;* FUNCTION NAME: L138_init_aic3106_registers                                 *
;*                                                                            *
;*   Regs Modified     : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,B0,B1,B2,B3,B4,*
;*                           B5,B6,B7,B8,B9,B10,B11,B12,SP,A16,A17,A18,A19,   *
;*                           A20,A21,A22,A23,A24,A25,A26,A27,A28,A29,A30,A31, *
;*                           B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27, *
;*                           B28,B29,B30,B31                                  *
;*   Regs Used         : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,B0,B1,B2,B3,B4,*
;*                           B5,B6,B7,B8,B9,B10,B11,B12,DP,SP,A16,A17,A18,A19,*
;*                           A20,A21,A22,A23,A24,A25,A26,A27,A28,A29,A30,A31, *
;*                           B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27, *
;*                           B28,B29,B30,B31                                  *
;*   Local Frame Size  : 0 Args + 0 Auto + 32 Save = 32 byte                  *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_L138_init_aic3106_registers:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
           STW     .D2T2   B12,*SP--(8)      ; |417| 
	.dwcfi	cfa_offset, 8
	.dwcfi	save_reg_to_mem, 28, 0
           STDW    .D2T2   B11:B10,*SP--     ; |417| 
	.dwcfi	cfa_offset, 16
	.dwcfi	save_reg_to_mem, 27, -4
	.dwcfi	save_reg_to_mem, 26, -8
           STW     .D2T2   B3,*SP--(8)       ; |417| 
	.dwcfi	cfa_offset, 24
	.dwcfi	save_reg_to_mem, 19, -16
           STDW    .D2T1   A11:A10,*SP--     ; |417| 
	.dwcfi	cfa_offset, 32
	.dwcfi	save_reg_to_mem, 11, -20
	.dwcfi	save_reg_to_mem, 10, -24
$C$DW$88	.dwtag  DW_TAG_variable, DW_AT_name("fs")
	.dwattr $C$DW$88, DW_AT_TI_symbol_name("_fs")
	.dwattr $C$DW$88, DW_AT_type(*$C$DW$T$86)
	.dwattr $C$DW$88, DW_AT_location[DW_OP_reg10]
$C$DW$89	.dwtag  DW_TAG_variable, DW_AT_name("adc_gain")
	.dwattr $C$DW$89, DW_AT_TI_symbol_name("_adc_gain")
	.dwattr $C$DW$89, DW_AT_type(*$C$DW$T$82)
	.dwattr $C$DW$89, DW_AT_location[DW_OP_reg27]
$C$DW$90	.dwtag  DW_TAG_variable, DW_AT_name("dac_atten")
	.dwattr $C$DW$90, DW_AT_TI_symbol_name("_dac_atten")
	.dwattr $C$DW$90, DW_AT_type(*$C$DW$T$82)
	.dwattr $C$DW$90, DW_AT_location[DW_OP_reg26]
$C$DW$91	.dwtag  DW_TAG_variable, DW_AT_name("input_type")
	.dwattr $C$DW$91, DW_AT_TI_symbol_name("_input_type")
	.dwattr $C$DW$91, DW_AT_type(*$C$DW$T$70)
	.dwattr $C$DW$91, DW_AT_location[DW_OP_reg11]

           MV      .L2     B4,B11            ; |417| 
||         MV      .S2X    A6,B10            ; |417| 
||         MV      .L1X    B6,A11            ; |417| 
||         MV      .S1     A4,A10            ; |417| 

	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 421,column 3,is_stmt
$C$DW$92	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$92, DW_AT_low_pc(0x00)
	.dwattr $C$DW$92, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$92, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         ZERO    .L2     B4                ; |421| 
||         ZERO    .L1     A4                ; |421| 

$C$RL4:    ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |421| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 422,column 3,is_stmt
           MVK     .S2     0x80,B4           ; |422| 
$C$DW$93	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$93, DW_AT_low_pc(0x00)
	.dwattr $C$DW$93, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$93, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0x1,A4            ; |422| 

$C$RL5:    ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |422| 
;** --------------------------------------------------------------------------*
           MVK     .S2     0x80,B12          ; |422| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 424,column 1,is_stmt

           MVK     .S1     22050,A3          ; |424| 
||         MVK     .S2     22050,B4          ; |424| 
||         MV      .L1     A10,A4            ; |424| 

           CMPGT   .L1     A10,A3,A0         ; |424| 
||         CMPEQ   .L2X    A10,B4,B0         ; |424| 
||         MVK     .S1     24000,A3          ; |424| 

   [ A0]   B       .S2     $C$L26            ; |424| 
||         MV      .D1     A0,A2             ; guard predicate rewrite
||         CMPEQ   .L1     A10,A3,A1         ; |424| 
|| [!A0]   MVK     .S1     12000,A3          ; |424| 

           MV      .L2X    A0,B1             ; |424| branch predicate copy
|| [ A2]   ZERO    .S2     B0                ; |424| nullify predicate
|| [!A0]   CMPGT   .L1     A4,A3,A0          ; |424| 

   [ B0]   B       .S2     $C$L32            ; |424| 
|| [!B1]   ZERO    .L1     A1                ; |424| nullify predicate
|| [ B1]   MVK     .S1     32000,A3          ; |424| 

   [ A1]   BNOP    .S1     $C$L31,2          ; |424| 
|| [ B1]   CMPEQ   .L1     A4,A3,A0          ; |424| 

           ; BRANCHCC OCCURS {$C$L26}        ; |424| 
;** --------------------------------------------------------------------------*
           NOP             2
           ; BRANCHCC OCCURS {$C$L32}        ; |424| 
;** --------------------------------------------------------------------------*

   [ A0]   B       .S2     $C$L25            ; |424| 
||         MV      .L2X    A3,B4
||         MVK     .S1     16000,A3          ; |424| 

           CMPEQ   .L2X    A4,B4,B0          ; |424| 
||         CMPEQ   .L1     A4,A3,A1          ; |424| 
|| [!A0]   MVK     .S1     9600,A3           ; |424| 

   [ A0]   ZERO    .L2     B0                ; |424| nullify predicate
|| [!A0]   CMPEQ   .L1     A4,A3,A1          ; |424| 

   [ B0]   BNOP    .S1     $C$L35,2          ; |424| 
           ; BRANCHCC OCCURS {$C$L25}        ; |424| 
;** --------------------------------------------------------------------------*

   [ B0]   ZERO    .L1     A1                ; |424| nullify predicate
|| [!B0]   MVK     .S1     11025,A3          ; |424| 

   [ A1]   BNOP    .S1     $C$L37,1          ; |424| 
|| [!B0]   CMPEQ   .L1     A4,A3,A0          ; |424| 

           ; BRANCHCC OCCURS {$C$L35}        ; |424| 
;** --------------------------------------------------------------------------*
   [ A1]   ZERO    .L1     A0                ; nullify predicate
   [ A0]   BNOP    .S1     $C$L36,2          ; |424| 
           ; BRANCHCC OCCURS {$C$L37}        ; |424| 
;** --------------------------------------------------------------------------*
   [!A0]   BNOP    .S1     $C$L27,2          ; |424| 
           ; BRANCHCC OCCURS {$C$L36}        ; |424| 
;** --------------------------------------------------------------------------*
           NOP             3
           ; BRANCH OCCURS {$C$L27}          ; |424| 
;** --------------------------------------------------------------------------*
$C$L25:    

   [ A1]   B       .S2     $C$L34            ; |424| 
||         MVK     .S1     19200,A3          ; |424| 

           CMPEQ   .L1     A4,A3,A0          ; |424| 
   [ A1]   ZERO    .L1     A0                ; nullify predicate
   [ A0]   BNOP    .S1     $C$L33,2          ; |424| 
           ; BRANCHCC OCCURS {$C$L34}        ; |424| 
;** --------------------------------------------------------------------------*
   [!A0]   BNOP    .S1     $C$L27,2          ; |424| 
           ; BRANCHCC OCCURS {$C$L33}        ; |424| 
;** --------------------------------------------------------------------------*
           NOP             3
           ; BRANCH OCCURS {$C$L27}          ; |424| 
;** --------------------------------------------------------------------------*
$C$L26:    

   [!A1]   MVKL    .S1     0xac44,A3
||         MV      .L1     A1,A2             ; guard predicate rewrite

   [!A1]   MVKH    .S1     0xac44,A3
|| [ A2]   ZERO    .L1     A0                ; |424| nullify predicate

   [ A0]   B       .S1     $C$L30            ; |424| 
|| [!A1]   CMPEQ   .L1     A4,A3,A1          ; |424| 

           ; BRANCHCC OCCURS {$C$L31}        ; |424| 
;** --------------------------------------------------------------------------*

           MV      .L1     A0,A2             ; guard predicate rewrite
|| [!A0]   MVKL    .S1     0xbb80,A3

   [ A2]   ZERO    .L1     A1                ; |424| nullify predicate
|| [!A0]   MVKH    .S1     0xbb80,A3

   [ A1]   BNOP    .S1     $C$L29,2          ; |424| 
|| [!A0]   CMPEQ   .L1     A4,A3,A0          ; |424| 

           ; BRANCHCC OCCURS {$C$L30}        ; |424| 
;** --------------------------------------------------------------------------*
   [ A1]   ZERO    .L1     A0                ; nullify predicate
   [ A0]   BNOP    .S1     $C$L28,1          ; |424| 
           ; BRANCHCC OCCURS {$C$L29}        ; |424| 
;** --------------------------------------------------------------------------*
           NOP             4
           ; BRANCHCC OCCURS {$C$L28}        ; |424| 
;** --------------------------------------------------------------------------*
$C$L27:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 427,column 4,is_stmt
$C$DW$94	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$94, DW_AT_low_pc(0x00)
	.dwattr $C$DW$94, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$94, DW_AT_TI_call
           CALL    .S1     _AIC3106_writeRegister ; |427| 
           MVK     .S2     0xaa,B4           ; |427| 
           ADDKPC  .S2     $C$RL6,B3,2       ; |427| 
           MVK     .L1     0x2,A4            ; |427| 
$C$RL6:    ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |427| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 428,column 7,is_stmt
$C$DW$95	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$95, DW_AT_low_pc(0x00)
	.dwattr $C$DW$95, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$95, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0x7,A4            ; |428| 
||         MVK     .L2     0xa,B4            ; |428| 

$C$RL7:    ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |428| 
;** --------------------------------------------------------------------------*
           MVK     .S1     0x22,A3
           MVK     .S1     0x66,A10
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 429,column 9,is_stmt
           BNOP    .S1     $C$L38,5          ; |429| 
           ; BRANCH OCCURS {$C$L38}          ; |429| 
;** --------------------------------------------------------------------------*
$C$L28:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 467,column 4,is_stmt
$C$DW$96	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$96, DW_AT_low_pc(0x00)
	.dwattr $C$DW$96, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$96, DW_AT_TI_call
           CALL    .S1     _AIC3106_writeRegister ; |467| 
           ADDKPC  .S2     $C$RL8,B3,3       ; |467| 

           ZERO    .L2     B4                ; |467| 
||         MVK     .L1     0x2,A4            ; |467| 

$C$RL8:    ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |467| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 468,column 7,is_stmt
$C$DW$97	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$97, DW_AT_low_pc(0x00)
	.dwattr $C$DW$97, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$97, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0x7,A4            ; |468| 
||         MVK     .L2     0xa,B4            ; |468| 

$C$RL9:    ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |468| 
;** --------------------------------------------------------------------------*
           MVK     .S1     0x22,A3
           MVK     .S1     0x66,A10
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 469,column 9,is_stmt
           BNOP    .S1     $C$L38,5          ; |469| 
           ; BRANCH OCCURS {$C$L38}          ; |469| 
;** --------------------------------------------------------------------------*
$C$L29:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 463,column 4,is_stmt
$C$DW$98	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$98, DW_AT_low_pc(0x00)
	.dwattr $C$DW$98, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$98, DW_AT_TI_call
           CALL    .S1     _AIC3106_writeRegister ; |463| 
           ADDKPC  .S2     $C$RL10,B3,3      ; |463| 

           ZERO    .L2     B4                ; |463| 
||         MVK     .L1     0x2,A4            ; |463| 

$C$RL10:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |463| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 464,column 7,is_stmt
           MVK     .S2     0x8a,B4           ; |464| 
$C$DW$99	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$99, DW_AT_low_pc(0x00)
	.dwattr $C$DW$99, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$99, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0x7,A4            ; |464| 

$C$RL11:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |464| 
;** --------------------------------------------------------------------------*
           MVK     .S1     0x22,A3
           MVK     .S1     0x66,A10
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 465,column 9,is_stmt
           BNOP    .S1     $C$L38,5          ; |465| 
           ; BRANCH OCCURS {$C$L38}          ; |465| 
;** --------------------------------------------------------------------------*
$C$L30:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 459,column 4,is_stmt
$C$DW$100	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$100, DW_AT_low_pc(0x00)
	.dwattr $C$DW$100, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$100, DW_AT_TI_call
           CALL    .S1     _AIC3106_writeRegister ; |459| 
           MVK     .S2     0x11,B4           ; |459| 
           ADDKPC  .S2     $C$RL12,B3,2      ; |459| 
           MVK     .L1     0x2,A4            ; |459| 
$C$RL12:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |459| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 460,column 7,is_stmt
$C$DW$101	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$101, DW_AT_low_pc(0x00)
	.dwattr $C$DW$101, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$101, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0x7,A4            ; |460| 
||         MVK     .L2     0xa,B4            ; |460| 

$C$RL13:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |460| 
;** --------------------------------------------------------------------------*
           MVK     .S1     0x22,A3
           MVK     .S1     0x66,A10
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 461,column 9,is_stmt
           BNOP    .S1     $C$L38,5          ; |461| 
           ; BRANCH OCCURS {$C$L38}          ; |461| 
;** --------------------------------------------------------------------------*
$C$L31:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 455,column 4,is_stmt
$C$DW$102	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$102, DW_AT_low_pc(0x00)
	.dwattr $C$DW$102, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$102, DW_AT_TI_call
           CALL    .S1     _AIC3106_writeRegister ; |455| 
           MVK     .S2     0x22,B4           ; |455| 
           ADDKPC  .S2     $C$RL14,B3,2      ; |455| 
           MVK     .L1     0x2,A4            ; |455| 
$C$RL14:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |455| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 456,column 7,is_stmt
$C$DW$103	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$103, DW_AT_low_pc(0x00)
	.dwattr $C$DW$103, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$103, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0x7,A4            ; |456| 
||         MVK     .L2     0xa,B4            ; |456| 

$C$RL15:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |456| 
;** --------------------------------------------------------------------------*
           MVK     .S1     0x66,A10
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 455,column 4,is_stmt
           MVK     .S1     0x22,A3           ; |455| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 457,column 9,is_stmt
           BNOP    .S1     $C$L38,5          ; |457| 
           ; BRANCH OCCURS {$C$L38}          ; |457| 
;** --------------------------------------------------------------------------*
$C$L32:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 451,column 4,is_stmt
$C$DW$104	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$104, DW_AT_low_pc(0x00)
	.dwattr $C$DW$104, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$104, DW_AT_TI_call
           CALL    .S1     _AIC3106_writeRegister ; |451| 
           MVK     .S2     0x22,B4           ; |451| 
           ADDKPC  .S2     $C$RL16,B3,2      ; |451| 
           MVK     .L1     0x2,A4            ; |451| 
$C$RL16:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |451| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 452,column 7,is_stmt
           MVK     .S2     0x8a,B4           ; |452| 
$C$DW$105	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$105, DW_AT_low_pc(0x00)
	.dwattr $C$DW$105, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$105, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0x7,A4            ; |452| 

$C$RL17:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |452| 
;** --------------------------------------------------------------------------*
           MVK     .S1     0x66,A10
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 451,column 4,is_stmt
           MVK     .S1     0x22,A3           ; |451| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 453,column 9,is_stmt
           BNOP    .S1     $C$L38,5          ; |453| 
           ; BRANCH OCCURS {$C$L38}          ; |453| 
;** --------------------------------------------------------------------------*
$C$L33:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 447,column 4,is_stmt
$C$DW$106	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$106, DW_AT_low_pc(0x00)
	.dwattr $C$DW$106, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$106, DW_AT_TI_call
           CALL    .S1     _AIC3106_writeRegister ; |447| 
           MVK     .S2     0x33,B4           ; |447| 
           ADDKPC  .S2     $C$RL18,B3,2      ; |447| 
           MVK     .L1     0x2,A4            ; |447| 
$C$RL18:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |447| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 448,column 7,is_stmt
$C$DW$107	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$107, DW_AT_low_pc(0x00)
	.dwattr $C$DW$107, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$107, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0x7,A4            ; |448| 
||         MVK     .L2     0xa,B4            ; |448| 

$C$RL19:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |448| 
;** --------------------------------------------------------------------------*
           MVK     .S1     0x22,A3
           MVK     .S1     0x66,A10
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 449,column 9,is_stmt
           BNOP    .S1     $C$L38,5          ; |449| 
           ; BRANCH OCCURS {$C$L38}          ; |449| 
;** --------------------------------------------------------------------------*
$C$L34:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 443,column 4,is_stmt
$C$DW$108	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$108, DW_AT_low_pc(0x00)
	.dwattr $C$DW$108, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$108, DW_AT_TI_call
           CALL    .S1     _AIC3106_writeRegister ; |443| 
           MVK     .S2     0x44,B4           ; |443| 
           ADDKPC  .S2     $C$RL20,B3,2      ; |443| 
           MVK     .L1     0x2,A4            ; |443| 
$C$RL20:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |443| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 444,column 7,is_stmt
$C$DW$109	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$109, DW_AT_low_pc(0x00)
	.dwattr $C$DW$109, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$109, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0x7,A4            ; |444| 
||         MVK     .L2     0xa,B4            ; |444| 

$C$RL21:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |444| 
;** --------------------------------------------------------------------------*
           MVK     .S1     0x22,A3
           MVK     .S1     0x66,A10
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 445,column 9,is_stmt
           BNOP    .S1     $C$L38,5          ; |445| 
           ; BRANCH OCCURS {$C$L38}          ; |445| 
;** --------------------------------------------------------------------------*
$C$L35:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 439,column 4,is_stmt
$C$DW$110	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$110, DW_AT_low_pc(0x00)
	.dwattr $C$DW$110, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$110, DW_AT_TI_call
           CALL    .S1     _AIC3106_writeRegister ; |439| 
           MVK     .S2     0x66,B4           ; |439| 
           ADDKPC  .S2     $C$RL22,B3,2      ; |439| 
           MVK     .L1     0x2,A4            ; |439| 
$C$RL22:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |439| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 440,column 7,is_stmt
$C$DW$111	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$111, DW_AT_low_pc(0x00)
	.dwattr $C$DW$111, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$111, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0x7,A4            ; |440| 
||         MVK     .L2     0xa,B4            ; |440| 

$C$RL23:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |440| 
;** --------------------------------------------------------------------------*
           MVK     .S1     0x22,A3
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 439,column 4,is_stmt
           MVK     .S1     0x66,A10          ; |439| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 441,column 9,is_stmt
           BNOP    .S1     $C$L38,5          ; |441| 
           ; BRANCH OCCURS {$C$L38}          ; |441| 
;** --------------------------------------------------------------------------*
$C$L36:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 435,column 4,is_stmt
$C$DW$112	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$112, DW_AT_low_pc(0x00)
	.dwattr $C$DW$112, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$112, DW_AT_TI_call
           CALL    .S1     _AIC3106_writeRegister ; |435| 
           MVK     .S2     0x66,B4           ; |435| 
           ADDKPC  .S2     $C$RL24,B3,2      ; |435| 
           MVK     .L1     0x2,A4            ; |435| 
$C$RL24:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |435| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 436,column 7,is_stmt
           MVK     .S2     0x8a,B4           ; |436| 
$C$DW$113	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$113, DW_AT_low_pc(0x00)
	.dwattr $C$DW$113, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$113, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0x7,A4            ; |436| 

$C$RL25:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |436| 
;** --------------------------------------------------------------------------*
           MVK     .S1     0x22,A3
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 435,column 4,is_stmt
           MVK     .S1     0x66,A10          ; |435| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 437,column 9,is_stmt
           BNOP    .S1     $C$L38,5          ; |437| 
           ; BRANCH OCCURS {$C$L38}          ; |437| 
;** --------------------------------------------------------------------------*
$C$L37:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 431,column 4,is_stmt
$C$DW$114	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$114, DW_AT_low_pc(0x00)
	.dwattr $C$DW$114, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$114, DW_AT_TI_call
           CALL    .S1     _AIC3106_writeRegister ; |431| 
           MVK     .S2     0x88,B4           ; |431| 
           ADDKPC  .S2     $C$RL26,B3,2      ; |431| 
           MVK     .L1     0x2,A4            ; |431| 
$C$RL26:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |431| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 432,column 7,is_stmt
$C$DW$115	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$115, DW_AT_low_pc(0x00)
	.dwattr $C$DW$115, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$115, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0x7,A4            ; |432| 
||         MVK     .L2     0xa,B4            ; |432| 

$C$RL27:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |432| 
;** --------------------------------------------------------------------------*
           MVK     .S1     0x22,A3
           MVK     .S1     0x66,A10
;** --------------------------------------------------------------------------*
$C$L38:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 476,column 3,is_stmt
$C$DW$116	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$116, DW_AT_low_pc(0x00)
	.dwattr $C$DW$116, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$116, DW_AT_TI_call
           CALL    .S1     _AIC3106_writeRegister ; |476| 
           EXTU    .S1     A3,24,24,A3       ; |476| 
           ADDKPC  .S2     $C$RL28,B3,2      ; |476| 

           MVK     .L1     0x3,A4            ; |476| 
||         MV      .L2X    A3,B4             ; |476| 

$C$RL28:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |476| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 479,column 3,is_stmt
           MVK     .S2     0x20,B4           ; |479| 
$C$DW$117	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$117, DW_AT_low_pc(0x00)
	.dwattr $C$DW$117, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$117, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0x4,A4            ; |479| 

$C$RL29:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |479| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 480,column 3,is_stmt
           MVK     .S2     0x6e,B4           ; |480| 
$C$DW$118	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$118, DW_AT_low_pc(0x00)
	.dwattr $C$DW$118, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$118, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0x5,A4            ; |480| 

$C$RL30:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |480| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 481,column 3,is_stmt
           MVK     .S2     0x23,B4           ; |481| 
$C$DW$119	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$119, DW_AT_low_pc(0x00)
	.dwattr $C$DW$119, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$119, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0x6,A4            ; |481| 

$C$RL31:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |481| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 482,column 3,is_stmt
           MVK     .S2     0xc0,B4           ; |482| 
$C$DW$120	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$120, DW_AT_low_pc(0x00)
	.dwattr $C$DW$120, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$120, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0x8,A4            ; |482| 

$C$RL32:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |482| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 483,column 3,is_stmt
           MVK     .S2     0x40,B4           ; |483| 
$C$DW$121	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$121, DW_AT_low_pc(0x00)
	.dwattr $C$DW$121, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$121, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0x9,A4            ; |483| 

$C$RL33:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |483| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 485,column 3,is_stmt
$C$DW$122	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$122, DW_AT_low_pc(0x00)
	.dwattr $C$DW$122, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$122, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0xc,A4            ; |485| 
||         ZERO    .L2     B4                ; |485| 

$C$RL34:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |485| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 488,column 3,is_stmt
$C$DW$123	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$123, DW_AT_low_pc(0x00)
	.dwattr $C$DW$123, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$123, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0xa,A4            ; |488| 
||         ZERO    .L2     B4                ; |488| 

$C$RL35:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |488| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 490,column 3,is_stmt
           EXTU    .S2     B11,24,24,B4      ; |490| 
$C$DW$124	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$124, DW_AT_low_pc(0x00)
	.dwattr $C$DW$124, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$124, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .L1     0xf,A4            ; |490| 

$C$RL36:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |490| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 491,column 3,is_stmt
           EXTU    .S2     B11,24,24,B4      ; |491| 
$C$DW$125	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$125, DW_AT_low_pc(0x00)
	.dwattr $C$DW$125, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$125, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .S1     0x10,A4           ; |491| 

$C$RL37:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |491| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 493,column 3,is_stmt
           MV      .L1     A11,A0
   [ A0]   BNOP    .S1     $C$L39,5          ; |493| 
           ; BRANCHCC OCCURS {$C$L39}        ; |493| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 495,column 5,is_stmt
$C$DW$126	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$126, DW_AT_low_pc(0x00)
	.dwattr $C$DW$126, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$126, DW_AT_TI_call
           CALL    .S1     _AIC3106_writeRegister ; |495| 
           ADDKPC  .S2     $C$RL38,B3,3      ; |495| 

           MVK     .L2     0x4,B4            ; |495| 
||         MVK     .S1     0x13,A4           ; |495| 

$C$RL38:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |495| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 496,column 5,is_stmt
$C$DW$127	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$127, DW_AT_low_pc(0x00)
	.dwattr $C$DW$127, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$127, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .S1     0x16,A4           ; |496| 
||         MVK     .L2     0x4,B4            ; |496| 

$C$RL39:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |496| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 497,column 3,is_stmt
           BNOP    .S1     $C$L40,5          ; |497| 
           ; BRANCH OCCURS {$C$L40}          ; |497| 
;** --------------------------------------------------------------------------*
$C$L39:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 500,column 5,is_stmt
$C$DW$128	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$128, DW_AT_low_pc(0x00)
	.dwattr $C$DW$128, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$128, DW_AT_TI_call
           CALL    .S1     _AIC3106_writeRegister ; |500| 
           MVK     .S2     0x7c,B4           ; |500| 
           ADDKPC  .S2     $C$RL40,B3,2      ; |500| 
           MVK     .S1     0x13,A4           ; |500| 
$C$RL40:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |500| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 501,column 5,is_stmt
           MVK     .S2     0x7c,B4           ; |501| 
$C$DW$129	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$129, DW_AT_low_pc(0x00)
	.dwattr $C$DW$129, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$129, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .S1     0x16,A4           ; |501| 

$C$RL41:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |501| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 502,column 5,is_stmt
$C$DW$130	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$130, DW_AT_low_pc(0x00)
	.dwattr $C$DW$130, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$130, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .S1     0x11,A4           ; |502| 
||         MVK     .L2     0xf,B4            ; |502| 

$C$RL42:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |502| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 503,column 5,is_stmt
           MVK     .S2     0xf0,B4           ; |503| 
$C$DW$131	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$131, DW_AT_low_pc(0x00)
	.dwattr $C$DW$131, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$131, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .S1     0x12,A4           ; |503| 

$C$RL43:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |503| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 504,column 5,is_stmt
           MVK     .S1     0x40,A3           ; |504| 
           EXTU    .S1     A3,24,24,A3       ; |504| 
           MVK     .S1     0x19,A4           ; |504| 
$C$DW$132	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$132, DW_AT_low_pc(0x00)
	.dwattr $C$DW$132, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$132, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MV      .L2X    A3,B4             ; |504| 

$C$RL44:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |504| 
;** --------------------------------------------------------------------------*
$C$L40:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 507,column 3,is_stmt
$C$DW$133	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$133, DW_AT_low_pc(0x00)
	.dwattr $C$DW$133, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$133, DW_AT_TI_call
           CALL    .S1     _AIC3106_writeRegister ; |507| 
           MVK     .S2     0xe0,B4           ; |507| 
           ADDKPC  .S2     $C$RL45,B3,2      ; |507| 
           MVK     .S1     0x25,A4           ; |507| 
$C$RL45:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |507| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 509,column 3,is_stmt
           EXTU    .S2     B10,24,24,B4      ; |509| 
$C$DW$134	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$134, DW_AT_low_pc(0x00)
	.dwattr $C$DW$134, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$134, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .S1     0x2b,A4           ; |509| 

$C$RL46:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |509| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 510,column 3,is_stmt
           EXTU    .S2     B10,24,24,B4      ; |510| 
$C$DW$135	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$135, DW_AT_low_pc(0x00)
	.dwattr $C$DW$135, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$135, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .S1     0x2c,A4           ; |510| 

$C$RL47:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |510| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 511,column 3,is_stmt
           EXTU    .S2     B12,24,24,B4      ; |511| 
$C$DW$136	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$136, DW_AT_low_pc(0x00)
	.dwattr $C$DW$136, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$136, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .S1     0x52,A4           ; |511| 

$C$RL48:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |511| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 512,column 3,is_stmt
$C$DW$137	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$137, DW_AT_low_pc(0x00)
	.dwattr $C$DW$137, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$137, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .S1     0x56,A4           ; |512| 
||         MVK     .L2     0x9,B4            ; |512| 

$C$RL49:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |512| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 513,column 3,is_stmt
           EXTU    .S2     B12,24,24,B4      ; |513| 
$C$DW$138	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$138, DW_AT_low_pc(0x00)
	.dwattr $C$DW$138, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$138, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .S1     0x5c,A4           ; |513| 

$C$RL50:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |513| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 514,column 3,is_stmt
$C$DW$139	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$139, DW_AT_low_pc(0x00)
	.dwattr $C$DW$139, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$139, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .S1     0x5d,A4           ; |514| 
||         MVK     .L2     0x9,B4            ; |514| 

$C$RL51:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |514| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 515,column 3,is_stmt
$C$DW$140	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$140, DW_AT_low_pc(0x00)
	.dwattr $C$DW$140, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$140, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         MVK     .S1     0x65,A4           ; |515| 
||         MVK     .L2     0x1,B4            ; |515| 

$C$RL52:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |515| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 516,column 3,is_stmt
$C$DW$141	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$141, DW_AT_low_pc(0x00)
	.dwattr $C$DW$141, DW_AT_name("_AIC3106_writeRegister")
	.dwattr $C$DW$141, DW_AT_TI_call

           CALLP   .S2     _AIC3106_writeRegister,B3
||         EXTU    .S1     A10,24,24,A4      ; |516| 
||         ZERO    .L2     B4                ; |516| 

$C$RL53:   ; CALL OCCURS {_AIC3106_writeRegister} {0}  ; |516| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 517,column 1,is_stmt
           LDDW    .D2T1   *++SP,A11:A10
	.dwcfi	cfa_offset, 24
	.dwcfi	restore_reg, 11
	.dwcfi	restore_reg, 10
           LDW     .D2T2   *++SP(8),B3
           NOP             2
	.dwcfi	cfa_offset, 16
	.dwcfi	restore_reg, 19
           LDDW    .D2T2   *++SP,B11:B10
	.dwcfi	cfa_offset, 8
	.dwcfi	restore_reg, 27
	.dwcfi	restore_reg, 26
           LDW     .D2T2   *++SP(8),B12      ; |517| 
	.dwcfi	cfa_offset, 0
	.dwcfi	restore_reg, 28
	.dwcfi	cfa_offset, 0
$C$DW$142	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$142, DW_AT_low_pc(0x00)
	.dwattr $C$DW$142, DW_AT_TI_return
           RETNOP  .S2     B3,5
           ; BRANCH OCCURS {B3}  
	.dwattr $C$DW$83, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$83, DW_AT_TI_end_line(0x205)
	.dwattr $C$DW$83, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$83

	.sect	".text"
	.clink
	.global	_L138_init_mcasp_poll

$C$DW$143	.dwtag  DW_TAG_subprogram, DW_AT_name("L138_init_mcasp_poll")
	.dwattr $C$DW$143, DW_AT_low_pc(_L138_init_mcasp_poll)
	.dwattr $C$DW$143, DW_AT_high_pc(0x00)
	.dwattr $C$DW$143, DW_AT_TI_symbol_name("_L138_init_mcasp_poll")
	.dwattr $C$DW$143, DW_AT_external
	.dwattr $C$DW$143, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$143, DW_AT_TI_begin_line(0x151)
	.dwattr $C$DW$143, DW_AT_TI_begin_column(0x06)
	.dwattr $C$DW$143, DW_AT_TI_max_frame_size(0x00)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 338,column 1,is_stmt,address _L138_init_mcasp_poll

	.dwfde $C$DW$CIE, _L138_init_mcasp_poll

;******************************************************************************
;* FUNCTION NAME: L138_init_mcasp_poll                                        *
;*                                                                            *
;*   Regs Modified     : A0,A3,A4,A5,A6,A7,A8,A9,B0,B4,B5,B6,B7,B8,B9,A16,A17,*
;*                           A18                                              *
;*   Regs Used         : A0,A3,A4,A5,A6,A7,A8,A9,B0,B3,B4,B5,B6,B7,B8,B9,A16, *
;*                           A17,A18                                          *
;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_L138_init_mcasp_poll:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 341,column 4,is_stmt

           MVKL    .S1     0x1d00044,A4
||         ZERO    .L1     A3                ; |341| 

           MVKH    .S1     0x1d00044,A4
           STW     .D1T1   A3,*A4            ; |341| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 344,column 4,is_stmt

           ADDAD   .D1     A4,4,A7
||         MVK     .L2     0xffffffff,B4     ; |344| 

           STW     .D1T2   B4,*A7            ; |344| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 345,column 4,is_stmt

           MVKL    .S2     0x80f8,B5
||         ADD     .L1     4,A7,A4

           MVKH    .S2     0x80f8,B5
           STW     .D1T2   B5,*A4            ; |345| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 346,column 4,is_stmt
           ADD     .L1     4,A4,A4
           STW     .D1T1   A3,*A4            ; |346| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 347,column 4,is_stmt
           ADD     .L1     4,A4,A4
           STW     .D1T1   A3,*A4            ; |347| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 348,column 4,is_stmt
           ADD     .L1     4,A4,A4
           STW     .D1T1   A3,*A4            ; |348| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 349,column 4,is_stmt

           ADD     .L1     4,A4,A4
||         MVK     .L2     0x1,B6            ; |349| 

           STW     .D1T2   B6,*A4            ; |349| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 350,column 4,is_stmt
           ADD     .L2X    4,A4,B7
           STW     .D2T1   A3,*B7            ; |350| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 351,column 4,is_stmt
           ADDAW   .D2     B7,3,B9
           STW     .D2T1   A3,*B9            ; |351| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 354,column 4,is_stmt
           ADDAW   .D2     B9,7,B8
           STW     .D2T2   B4,*B8            ; |354| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 355,column 4,is_stmt
           ADD     .L2     4,B8,B4
           STW     .D2T2   B5,*B4            ; |355| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 356,column 4,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T1   A3,*B4            ; |356| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 357,column 4,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T1   A3,*B4            ; |357| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 358,column 4,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T1   A3,*B4            ; |358| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 359,column 4,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T2   B6,*B4            ; |359| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 360,column 4,is_stmt
           ADD     .L2     4,B4,B6
           STW     .D2T1   A3,*B6            ; |360| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 361,column 4,is_stmt
           ADDAW   .D2     B6,3,B4
           STW     .D2T1   A3,*B4            ; |361| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 363,column 4,is_stmt

           MVK     .S1     236,A8
||         MVK     .L2     13,B5             ; |363| 

           ADD     .L1X    B4,A8,A8
           STW     .D1T2   B5,*A8            ; |363| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 364,column 4,is_stmt

           MVK     .L1     14,A4             ; |364| 
||         ADD     .S1     4,A8,A18

           STW     .D1T1   A4,*A18           ; |364| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 367,column 4,is_stmt
           MVK     .S2     184,B5
           SUB     .L2     B4,B5,B5
           STW     .D2T1   A3,*B5            ; |367| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 368,column 4,is_stmt

           ADD     .L2     4,B5,B4
||         MVK     .S2     8192,B5           ; |368| 

           STW     .D2T2   B5,*B4            ; |368| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 371,column 4,is_stmt
           MVK     .S1     60,A4
           ADD     .L1X    B4,A4,A4
           STW     .D1T1   A3,*A4            ; |371| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 372,column 4,is_stmt
           ADD     .L1     -4,A4,A4
           STW     .D1T1   A3,*A4            ; |372| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 373,column 4,is_stmt
           ADD     .L1     -4,A4,A4
           STW     .D1T1   A3,*A4            ; |373| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 377,column 4,is_stmt
           ADD     .L2     -4,B8,B4
           LDW     .D2T2   *B4,B5            ; |377| 
           NOP             4
           SET     .S2     B5,9,9,B5         ; |377| 
           STW     .D2T2   B5,*B4            ; |377| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 378,column 11,is_stmt
           MV      .L1X    B4,A9
           LDW     .D1T1   *A9,A3            ; |378| 
           NOP             4
           EXTU    .S1     A3,22,31,A0       ; |378| 
   [ A0]   BNOP    .S1     $C$L44,5          ; |378| 
           ; BRANCHCC OCCURS {$C$L44}        ; |378| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 377,column 4,is_stmt
           ZERO    .L1     A0
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 378
;*      Loop opening brace source line   : 378
;*      Loop closing brace source line   : 378
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 1
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       0     
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Did not find schedule
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Did not find schedule
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Did not find schedule
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L41:    ; PIPED LOOP PROLOG
   [!A0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L42:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_poll$4$B:
           NOP             2

           SPMASK          L1
||         MV      .L1     A9,A5             ; |377| 

   [!A0]   LDW     .D1T1   *A5,A4            ; |378| (P) <0,3>  ^ 
           NOP             2

           SPMASK          S1
||         MVK     .S1     0x200,A6          ; |377| 

           NOP             1
           AND     .L1     A6,A4,A3          ; |378| <0,8>  ^ 
           MV      .L1     A3,A0             ; |378| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_poll$4$E:
;** --------------------------------------------------------------------------*
$C$L43:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L44:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 379,column 4,is_stmt

           ADD     .L1     -4,A7,A17
||         ADD     .S1     -4,A7,A7

           LDW     .D1T1   *A7,A5            ; |379| 
           NOP             4
           OR      .L1     2,A5,A5           ; |379| 
           STW     .D1T1   A5,*A17           ; |379| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 380,column 11,is_stmt
           LDW     .D1T1   *A17,A5           ; |380| 
           NOP             4
           AND     .L1     2,A5,A0           ; |380| 

   [ A0]   BNOP    .S1     $C$L48,5          ; |380| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L48}        ; |380| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 380
;*      Loop opening brace source line   : 380
;*      Loop closing brace source line   : 380
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L45:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L46:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_poll$8$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A7,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |380| (P) <0,3>  ^ 
           NOP             4
           AND     .L1     2,A3,A0           ; |380| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |380| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_poll$8$E:
;** --------------------------------------------------------------------------*
$C$L47:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
           MV      .L1     A4,A7
;** --------------------------------------------------------------------------*
$C$L48:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 382,column 4,is_stmt

           ZERO    .L2     B4
||         ADD     .S2     4,B6,B5

           SET     .S2     B4,0x0,0xf,B4
           STW     .D2T2   B4,*B5            ; |382| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 383,column 4,is_stmt
           ADD     .L2     4,B7,B5
           STW     .D2T2   B4,*B5            ; |383| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 386,column 4,is_stmt
           LDW     .D1T1   *A9,A5            ; |386| 
           MV      .L1     A9,A16
           NOP             3
           SET     .S1     A5,10,10,A5       ; |386| 
           STW     .D1T1   A5,*A16           ; |386| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 387,column 11,is_stmt
           LDW     .D1T1   *A16,A5           ; |387| 
           NOP             4
           EXTU    .S1     A5,21,31,A0       ; |387| 
   [ A0]   BNOP    .S1     $C$L52,5          ; |387| 
           ; BRANCHCC OCCURS {$C$L52}        ; |387| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 386,column 4,is_stmt
           ZERO    .L1     A0
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 387
;*      Loop opening brace source line   : 387
;*      Loop closing brace source line   : 387
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 1
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       0     
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Did not find schedule
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Did not find schedule
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Did not find schedule
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L49:    ; PIPED LOOP PROLOG
   [!A0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L50:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_poll$14$B:
           NOP             2

           SPMASK          L1
||         MV      .L1     A16,A5            ; |386| 

   [!A0]   LDW     .D1T1   *A5,A4            ; |387| (P) <0,3>  ^ 
           NOP             2

           SPMASK          S1
||         MVK     .S1     0x400,A6          ; |386| 

           NOP             1
           AND     .L1     A6,A4,A3          ; |387| <0,8>  ^ 
           MV      .L1     A3,A0             ; |387| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_poll$14$E:
;** --------------------------------------------------------------------------*
$C$L51:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L52:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 388,column 4,is_stmt
           LDW     .D1T1   *A17,A5           ; |388| 
           NOP             4
           OR      .L1     4,A5,A5           ; |388| 
           STW     .D1T1   A5,*A17           ; |388| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 389,column 11,is_stmt
           LDW     .D1T1   *A17,A5           ; |389| 
           NOP             4
           AND     .L1     4,A5,A0           ; |389| 

   [ A0]   BNOP    .S1     $C$L56,5          ; |389| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L56}        ; |389| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 389
;*      Loop opening brace source line   : 389
;*      Loop closing brace source line   : 389
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L53:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L54:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_poll$18$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A7,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |389| (P) <0,3>  ^ 
           NOP             4
           AND     .L1     4,A3,A0           ; |389| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |389| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_poll$18$E:
;** --------------------------------------------------------------------------*
$C$L55:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
           MV      .L1     A4,A7
;** --------------------------------------------------------------------------*
$C$L56:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 392,column 4,is_stmt

           ADDAW   .D1     A18,31,A9
||         ZERO    .L2     B5                ; |392| 

           STW     .D1T2   B5,*A9            ; |392| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 393,column 4,is_stmt
           MVK     .S2     132,B4
           ADD     .L2X    A9,B4,B4
           STW     .D2T2   B5,*B4            ; |393| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 395,column 4,is_stmt
           LDW     .D1T1   *A16,A6           ; |395| 
           MV      .L1     A16,A5
           NOP             3
           SET     .S1     A6,11,11,A6       ; |395| 
           STW     .D1T1   A6,*A5            ; |395| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 396,column 11,is_stmt
           LDW     .D1T1   *A16,A5           ; |396| 
           NOP             4
           EXTU    .S1     A5,20,31,A0       ; |396| 
   [ A0]   BNOP    .S1     $C$L60,5          ; |396| 
           ; BRANCHCC OCCURS {$C$L60}        ; |396| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 395,column 4,is_stmt
           MV      .L1X    B5,A0             ; |395| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 396
;*      Loop opening brace source line   : 396
;*      Loop closing brace source line   : 396
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 1
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       0     
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Did not find schedule
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Did not find schedule
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Did not find schedule
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L57:    ; PIPED LOOP PROLOG
   [!A0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L58:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_poll$24$B:
           NOP             2

           SPMASK          L1
||         MV      .L1     A16,A5            ; |395| 

   [!A0]   LDW     .D1T1   *A5,A4            ; |396| (P) <0,3>  ^ 
           NOP             2

           SPMASK          S1
||         MVK     .S1     0x800,A6          ; |395| 

           NOP             1
           AND     .L1     A6,A4,A3          ; |396| <0,8>  ^ 
           MV      .L1     A3,A0             ; |396| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_poll$24$E:
;** --------------------------------------------------------------------------*
$C$L59:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L60:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 397,column 4,is_stmt
           LDW     .D1T1   *A17,A5           ; |397| 
           NOP             4
           OR      .L1     8,A5,A5           ; |397| 
           STW     .D1T1   A5,*A17           ; |397| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 398,column 11,is_stmt
           LDW     .D1T1   *A17,A5           ; |398| 
           NOP             4
           AND     .L1     8,A5,A0           ; |398| 

   [ A0]   BNOP    .S1     $C$L64,5          ; |398| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L64}        ; |398| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 398
;*      Loop opening brace source line   : 398
;*      Loop closing brace source line   : 398
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L61:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L62:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_poll$28$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A7,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |398| (P) <0,3>  ^ 
           NOP             4
           AND     .L1     8,A3,A0           ; |398| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |398| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_poll$28$E:
;** --------------------------------------------------------------------------*
$C$L63:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
           MV      .L1     A4,A7
;** --------------------------------------------------------------------------*
$C$L64:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 400,column 4,is_stmt
           MV      .L1     A16,A5
           LDW     .D1T1   *A5,A6            ; |400| 
           NOP             4
           SET     .S1     A6,12,12,A6       ; |400| 
           STW     .D1T1   A6,*A5            ; |400| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 401,column 11,is_stmt
           LDW     .D1T1   *A5,A6            ; |401| 
           NOP             4
           EXTU    .S1     A6,19,31,A0       ; |401| 
   [ A0]   BNOP    .S1     $C$L68,5          ; |401| 
           ; BRANCHCC OCCURS {$C$L68}        ; |401| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 400,column 4,is_stmt
           ZERO    .L1     A0
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 401
;*      Loop opening brace source line   : 401
;*      Loop closing brace source line   : 401
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 1
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       0     
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Did not find schedule
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Did not find schedule
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Did not find schedule
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L65:    ; PIPED LOOP PROLOG
   [!A0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L66:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_poll$34$B:
           NOP             3
   [!A0]   LDW     .D1T1   *A5,A4            ; |401| (P) <0,3>  ^ 
           NOP             2

           SPMASK          S1
||         MVK     .S1     0x1000,A6         ; |400| 

           NOP             1
           AND     .L1     A6,A4,A3          ; |401| <0,8>  ^ 
           MV      .L1     A3,A0             ; |401| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_poll$34$E:
;** --------------------------------------------------------------------------*
$C$L67:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L68:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 402,column 4,is_stmt
           NOP             1
           MV      .L1     A17,A4
           LDW     .D1T1   *A4,A5            ; |402| 
           NOP             4
           SET     .S1     A5,4,4,A5         ; |402| 
           STW     .D1T1   A5,*A4            ; |402| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 403,column 11,is_stmt
           LDW     .D1T1   *A17,A4           ; |403| 
           NOP             4
           EXTU    .S1     A4,27,31,A0       ; |403| 

   [ A0]   BNOP    .S1     $C$L72,5          ; |403| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L72}        ; |403| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 403
;*      Loop opening brace source line   : 403
;*      Loop closing brace source line   : 403
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     1*       0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          1        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             1*       0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L69:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L70:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_poll$38$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A7,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |403| (P) <0,3>  ^ 
           NOP             4
           EXTU    .S1     A3,27,31,A0       ; |403| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |403| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_poll$38$E:
;** --------------------------------------------------------------------------*
$C$L71:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L72:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 406,column 10,is_stmt
           LDW     .D1T1   *A8,A4            ; |406| 
           NOP             4
           EXTU    .S1     A4,27,31,A0       ; |406| 

   [ A0]   BNOP    .S1     $C$L76,5          ; |406| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L76}        ; |406| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 406
;*      Loop opening brace source line   : 406
;*      Loop closing brace source line   : 406
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     1*       0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          1        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             1*       0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L73:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L74:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_poll$42$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A8,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |406| (P) <0,3>  ^ 
           NOP             4
           EXTU    .S1     A3,27,31,A0       ; |406| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |406| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_poll$42$E:
;** --------------------------------------------------------------------------*
$C$L75:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L76:    
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 407,column 4,is_stmt
           ZERO    .L1     A3                ; |407| 
           STW     .D1T1   A3,*A9            ; |407| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 409,column 1,is_stmt
	.dwcfi	cfa_offset, 0
$C$DW$144	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$144, DW_AT_low_pc(0x00)
	.dwattr $C$DW$144, DW_AT_TI_return
           RETNOP  .S2     B3,5              ; |409| 
           ; BRANCH OCCURS {B3}              ; |409| 

$C$DW$145	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$145, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L74:1:1589536273")
	.dwattr $C$DW$145, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$145, DW_AT_TI_begin_line(0x196)
	.dwattr $C$DW$145, DW_AT_TI_end_line(0x196)
$C$DW$146	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$146, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_poll$42$B)
	.dwattr $C$DW$146, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_poll$42$E)
	.dwendtag $C$DW$145


$C$DW$147	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$147, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L70:1:1589536273")
	.dwattr $C$DW$147, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$147, DW_AT_TI_begin_line(0x193)
	.dwattr $C$DW$147, DW_AT_TI_end_line(0x193)
$C$DW$148	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$148, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_poll$38$B)
	.dwattr $C$DW$148, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_poll$38$E)
	.dwendtag $C$DW$147


$C$DW$149	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$149, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L66:1:1589536273")
	.dwattr $C$DW$149, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$149, DW_AT_TI_begin_line(0x191)
	.dwattr $C$DW$149, DW_AT_TI_end_line(0x191)
$C$DW$150	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$150, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_poll$34$B)
	.dwattr $C$DW$150, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_poll$34$E)
	.dwendtag $C$DW$149


$C$DW$151	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$151, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L62:1:1589536273")
	.dwattr $C$DW$151, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$151, DW_AT_TI_begin_line(0x18e)
	.dwattr $C$DW$151, DW_AT_TI_end_line(0x18e)
$C$DW$152	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$152, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_poll$28$B)
	.dwattr $C$DW$152, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_poll$28$E)
	.dwendtag $C$DW$151


$C$DW$153	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$153, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L58:1:1589536273")
	.dwattr $C$DW$153, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$153, DW_AT_TI_begin_line(0x18c)
	.dwattr $C$DW$153, DW_AT_TI_end_line(0x18c)
$C$DW$154	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$154, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_poll$24$B)
	.dwattr $C$DW$154, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_poll$24$E)
	.dwendtag $C$DW$153


$C$DW$155	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$155, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L54:1:1589536273")
	.dwattr $C$DW$155, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$155, DW_AT_TI_begin_line(0x185)
	.dwattr $C$DW$155, DW_AT_TI_end_line(0x185)
$C$DW$156	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$156, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_poll$18$B)
	.dwattr $C$DW$156, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_poll$18$E)
	.dwendtag $C$DW$155


$C$DW$157	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$157, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L50:1:1589536273")
	.dwattr $C$DW$157, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$157, DW_AT_TI_begin_line(0x183)
	.dwattr $C$DW$157, DW_AT_TI_end_line(0x183)
$C$DW$158	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$158, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_poll$14$B)
	.dwattr $C$DW$158, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_poll$14$E)
	.dwendtag $C$DW$157


$C$DW$159	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$159, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L46:1:1589536273")
	.dwattr $C$DW$159, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$159, DW_AT_TI_begin_line(0x17c)
	.dwattr $C$DW$159, DW_AT_TI_end_line(0x17c)
$C$DW$160	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$160, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_poll$8$B)
	.dwattr $C$DW$160, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_poll$8$E)
	.dwendtag $C$DW$159


$C$DW$161	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$161, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L42:1:1589536273")
	.dwattr $C$DW$161, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$161, DW_AT_TI_begin_line(0x17a)
	.dwattr $C$DW$161, DW_AT_TI_end_line(0x17a)
$C$DW$162	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$162, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_poll$4$B)
	.dwattr $C$DW$162, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_poll$4$E)
	.dwendtag $C$DW$161

	.dwattr $C$DW$143, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$143, DW_AT_TI_end_line(0x199)
	.dwattr $C$DW$143, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$143

	.sect	".text"
	.clink
	.global	_L138_init_LCDK_DIP

$C$DW$163	.dwtag  DW_TAG_subprogram, DW_AT_name("L138_init_LCDK_DIP")
	.dwattr $C$DW$163, DW_AT_low_pc(_L138_init_LCDK_DIP)
	.dwattr $C$DW$163, DW_AT_high_pc(0x00)
	.dwattr $C$DW$163, DW_AT_TI_symbol_name("_L138_init_LCDK_DIP")
	.dwattr $C$DW$163, DW_AT_external
	.dwattr $C$DW$163, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$163, DW_AT_TI_begin_line(0x207)
	.dwattr $C$DW$163, DW_AT_TI_begin_column(0x06)
	.dwattr $C$DW$163, DW_AT_TI_max_frame_size(0x08)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 520,column 1,is_stmt,address _L138_init_LCDK_DIP

	.dwfde $C$DW$CIE, _L138_init_LCDK_DIP

;******************************************************************************
;* FUNCTION NAME: L138_init_LCDK_DIP                                          *
;*                                                                            *
;*   Regs Modified     : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6,  *
;*                           B7,B8,B9,SP,A16,A17,A18,A19,A20,A21,A22,A23,A24, *
;*                           A25,A26,A27,A28,A29,A30,A31,B16,B17,B18,B19,B20, *
;*                           B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31      *
;*   Regs Used         : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6,  *
;*                           B7,B8,B9,DP,SP,A16,A17,A18,A19,A20,A21,A22,A23,  *
;*                           A24,A25,A26,A27,A28,A29,A30,A31,B16,B17,B18,B19, *
;*                           B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31  *
;*   Local Frame Size  : 0 Args + 0 Auto + 4 Save = 4 byte                    *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_L138_init_LCDK_DIP:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
           STW     .D2T2   B3,*SP--(8)       ; |520| 
	.dwcfi	cfa_offset, 8
	.dwcfi	save_reg_to_mem, 19, 0
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 521,column 3,is_stmt
           MVK     .L1     0x1,A6            ; |521| 
           ZERO    .L1     A4                ; |521| 
$C$DW$164	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$164, DW_AT_low_pc(0x00)
	.dwattr $C$DW$164, DW_AT_name("_GPIO_setDir")
	.dwattr $C$DW$164, DW_AT_TI_call

           CALLP   .S2     _GPIO_setDir,B3
||         MV      .L2X    A6,B4             ; |521| 

$C$RL54:   ; CALL OCCURS {_GPIO_setDir} {0}  ; |521| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 522,column 3,is_stmt
$C$DW$165	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$165, DW_AT_low_pc(0x00)
	.dwattr $C$DW$165, DW_AT_name("_GPIO_setDir")
	.dwattr $C$DW$165, DW_AT_TI_call

           CALLP   .S2     _GPIO_setDir,B3
||         ZERO    .L1     A4                ; |522| 
||         MVK     .L2     0x2,B4            ; |522| 
||         MVK     .S1     0x1,A6            ; |522| 

$C$RL55:   ; CALL OCCURS {_GPIO_setDir} {0}  ; |522| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 523,column 3,is_stmt
$C$DW$166	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$166, DW_AT_low_pc(0x00)
	.dwattr $C$DW$166, DW_AT_name("_GPIO_setDir")
	.dwattr $C$DW$166, DW_AT_TI_call

           CALLP   .S2     _GPIO_setDir,B3
||         ZERO    .L1     A4                ; |523| 
||         MVK     .L2     0x3,B4            ; |523| 
||         MVK     .S1     0x1,A6            ; |523| 

$C$RL56:   ; CALL OCCURS {_GPIO_setDir} {0}  ; |523| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 524,column 3,is_stmt
$C$DW$167	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$167, DW_AT_low_pc(0x00)
	.dwattr $C$DW$167, DW_AT_name("_GPIO_setDir")
	.dwattr $C$DW$167, DW_AT_TI_call

           CALLP   .S2     _GPIO_setDir,B3
||         ZERO    .L1     A4                ; |524| 
||         MVK     .L2     0x4,B4            ; |524| 
||         MVK     .S1     0x1,A6            ; |524| 

$C$RL57:   ; CALL OCCURS {_GPIO_setDir} {0}  ; |524| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 526,column 1,is_stmt
           LDW     .D2T2   *++SP(8),B3       ; |526| 
           NOP             4
	.dwcfi	cfa_offset, 0
	.dwcfi	restore_reg, 19
	.dwcfi	cfa_offset, 0
$C$DW$168	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$168, DW_AT_low_pc(0x00)
	.dwattr $C$DW$168, DW_AT_TI_return
           RETNOP  .S2     B3,5              ; |526| 
           ; BRANCH OCCURS {B3}              ; |526| 
	.dwattr $C$DW$163, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$163, DW_AT_TI_end_line(0x20e)
	.dwattr $C$DW$163, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$163

	.sect	".text"
	.clink
	.global	_L138_initialise_poll

$C$DW$169	.dwtag  DW_TAG_subprogram, DW_AT_name("L138_initialise_poll")
	.dwattr $C$DW$169, DW_AT_low_pc(_L138_initialise_poll)
	.dwattr $C$DW$169, DW_AT_high_pc(0x00)
	.dwattr $C$DW$169, DW_AT_TI_symbol_name("_L138_initialise_poll")
	.dwattr $C$DW$169, DW_AT_external
	.dwattr $C$DW$169, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$169, DW_AT_TI_begin_line(0x255)
	.dwattr $C$DW$169, DW_AT_TI_begin_column(0x06)
	.dwattr $C$DW$169, DW_AT_TI_max_frame_size(0x20)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 598,column 1,is_stmt,address _L138_initialise_poll

	.dwfde $C$DW$CIE, _L138_initialise_poll
$C$DW$170	.dwtag  DW_TAG_formal_parameter, DW_AT_name("fs")
	.dwattr $C$DW$170, DW_AT_TI_symbol_name("_fs")
	.dwattr $C$DW$170, DW_AT_type(*$C$DW$T$60)
	.dwattr $C$DW$170, DW_AT_location[DW_OP_reg4]
$C$DW$171	.dwtag  DW_TAG_formal_parameter, DW_AT_name("adc_gain")
	.dwattr $C$DW$171, DW_AT_TI_symbol_name("_adc_gain")
	.dwattr $C$DW$171, DW_AT_type(*$C$DW$T$62)
	.dwattr $C$DW$171, DW_AT_location[DW_OP_reg20]
$C$DW$172	.dwtag  DW_TAG_formal_parameter, DW_AT_name("dac_atten")
	.dwattr $C$DW$172, DW_AT_TI_symbol_name("_dac_atten")
	.dwattr $C$DW$172, DW_AT_type(*$C$DW$T$62)
	.dwattr $C$DW$172, DW_AT_location[DW_OP_reg6]
$C$DW$173	.dwtag  DW_TAG_formal_parameter, DW_AT_name("input_type")
	.dwattr $C$DW$173, DW_AT_TI_symbol_name("_input_type")
	.dwattr $C$DW$173, DW_AT_type(*$C$DW$T$66)
	.dwattr $C$DW$173, DW_AT_location[DW_OP_reg22]

;******************************************************************************
;* FUNCTION NAME: L138_initialise_poll                                        *
;*                                                                            *
;*   Regs Modified     : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,B0,B1, *
;*                           B2,B3,B4,B5,B6,B7,B8,B9,SP,A16,A17,A18,A19,A20,  *
;*                           A21,A22,A23,A24,A25,A26,A27,A28,A29,A30,A31,B16, *
;*                           B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28, *
;*                           B29,B30,B31                                      *
;*   Regs Used         : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,B0,B1, *
;*                           B2,B3,B4,B5,B6,B7,B8,B9,DP,SP,A16,A17,A18,A19,   *
;*                           A20,A21,A22,A23,A24,A25,A26,A27,A28,A29,A30,A31, *
;*                           B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27, *
;*                           B28,B29,B30,B31                                  *
;*   Local Frame Size  : 0 Args + 0 Auto + 32 Save = 32 byte                  *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_L138_initialise_poll:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
           STW     .D2T2   B3,*SP--(8)       ; |598| 
	.dwcfi	cfa_offset, 8
	.dwcfi	save_reg_to_mem, 19, 0
           STDW    .D2T1   A13:A12,*SP--     ; |598| 
	.dwcfi	cfa_offset, 16
	.dwcfi	save_reg_to_mem, 13, -4
	.dwcfi	save_reg_to_mem, 12, -8
           STDW    .D2T1   A11:A10,*SP--     ; |598| 
	.dwcfi	cfa_offset, 24
	.dwcfi	save_reg_to_mem, 11, -12
	.dwcfi	save_reg_to_mem, 10, -16
$C$DW$174	.dwtag  DW_TAG_variable, DW_AT_name("input_type")
	.dwattr $C$DW$174, DW_AT_TI_symbol_name("_input_type")
	.dwattr $C$DW$174, DW_AT_type(*$C$DW$T$70)
	.dwattr $C$DW$174, DW_AT_location[DW_OP_reg13]
$C$DW$175	.dwtag  DW_TAG_variable, DW_AT_name("dac_atten")
	.dwattr $C$DW$175, DW_AT_TI_symbol_name("_dac_atten")
	.dwattr $C$DW$175, DW_AT_type(*$C$DW$T$82)
	.dwattr $C$DW$175, DW_AT_location[DW_OP_reg12]
$C$DW$176	.dwtag  DW_TAG_variable, DW_AT_name("adc_gain")
	.dwattr $C$DW$176, DW_AT_TI_symbol_name("_adc_gain")
	.dwattr $C$DW$176, DW_AT_type(*$C$DW$T$82)
	.dwattr $C$DW$176, DW_AT_location[DW_OP_reg11]
$C$DW$177	.dwtag  DW_TAG_variable, DW_AT_name("fs")
	.dwattr $C$DW$177, DW_AT_TI_symbol_name("_fs")
	.dwattr $C$DW$177, DW_AT_type(*$C$DW$T$86)
	.dwattr $C$DW$177, DW_AT_location[DW_OP_reg10]
           MV      .L1X    B6,A13            ; |598| 

           MV      .L1     A6,A12            ; |598| 
||         MV      .S1X    B4,A11            ; |598| 
||         MV      .D1     A4,A10            ; |598| 

	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 600,column 3,is_stmt
           MVK     .L2     1,B4              ; |600| 
           STW     .D2T2   B4,*+DP(_poll)    ; |600| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 602,column 3,is_stmt
$C$DW$178	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$178, DW_AT_low_pc(0x00)
	.dwattr $C$DW$178, DW_AT_name("_USTIMER_init")
	.dwattr $C$DW$178, DW_AT_TI_call
           CALLP   .S2     _USTIMER_init,B3
$C$RL58:   ; CALL OCCURS {_USTIMER_init} {0}  ; |602| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 604,column 3,is_stmt
           MVKL    .S1     0x1e27000,A4
$C$DW$179	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$179, DW_AT_low_pc(0x00)
	.dwattr $C$DW$179, DW_AT_name("_EVMOMAPL138_lpscTransition")
	.dwattr $C$DW$179, DW_AT_TI_call

           CALLP   .S2     _EVMOMAPL138_lpscTransition,B3
||         MVKH    .S1     0x1e27000,A4
||         MVK     .L2     0x1,B4            ; |604| 
||         MVK     .L1     0x7,A6            ; |604| 
||         MVK     .D2     0x3,B6            ; |604| 

$C$RL59:   ; CALL OCCURS {_EVMOMAPL138_lpscTransition} {0}  ; |604| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 605,column 3,is_stmt
           ZERO    .L2     B4

           MVKL    .S1     0x1111111,A6
||         SET     .S2     B4,0x0,0x1b,B4

$C$DW$180	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$180, DW_AT_low_pc(0x00)
	.dwattr $C$DW$180, DW_AT_name("_EVMOMAPL138_pinmuxConfig")
	.dwattr $C$DW$180, DW_AT_TI_call

           CALLP   .S2     _EVMOMAPL138_pinmuxConfig,B3
||         MVKH    .S1     0x1111111,A6
||         ZERO    .L1     A4                ; |605| 

$C$RL60:   ; CALL OCCURS {_EVMOMAPL138_pinmuxConfig} {0}  ; |605| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 606,column 3,is_stmt
           ZERO    .L2     B4

           MVKL    .S1     0x8888110,A6
||         SET     .S2     B4,0x4,0x1b,B4

$C$DW$181	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$181, DW_AT_low_pc(0x00)
	.dwattr $C$DW$181, DW_AT_name("_EVMOMAPL138_pinmuxConfig")
	.dwattr $C$DW$181, DW_AT_TI_call

           CALLP   .S2     _EVMOMAPL138_pinmuxConfig,B3
||         MVKH    .S1     0x8888110,A6
||         MVK     .L1     0x1,A4            ; |606| 

$C$RL61:   ; CALL OCCURS {_EVMOMAPL138_pinmuxConfig} {0}  ; |606| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 608,column 3,is_stmt
           MVKL    .S1     0x1c22024,A3

           MVKH    .S1     0x1c22024,A3
||         ZERO    .L1     A4                ; |608| 

           STW     .D1T1   A4,*A3            ; |608| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 609,column 3,is_stmt
           MVK     .S2     12,B5

           ADD     .L2X    A3,B5,B5
||         MVK     .S2     2,B4              ; |609| 

           STW     .D2T2   B4,*B5            ; |609| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 610,column 3,is_stmt

           SUBAW   .D2     B5,9,B4
||         MVK     .L2     0x5,B5            ; |610| 

           STW     .D2T2   B5,*B4            ; |610| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 611,column 3,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T2   B5,*B4            ; |611| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 612,column 3,is_stmt
           LDW     .D1T1   *A3,A4            ; |612| 
           NOP             4
           SET     .S1     A4,5,5,A4         ; |612| 
           STW     .D1T1   A4,*A3            ; |612| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 614,column 3,is_stmt
           ZERO    .L2     B4                ; |614| 
           MVC     .S2     B4,CSR            ; |614| 
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 617,column 3,is_stmt
           MV      .L2X    A11,B4            ; |617| 
$C$DW$182	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$182, DW_AT_low_pc(0x00)
	.dwattr $C$DW$182, DW_AT_name("_L138_init_aic3106_registers")
	.dwattr $C$DW$182, DW_AT_TI_call

           CALLP   .S2     _L138_init_aic3106_registers,B3
||         MV      .L2X    A13,B6            ; |617| 
||         MV      .L1     A12,A6            ; |617| 
||         MV      .S1     A10,A4            ; |617| 

$C$RL62:   ; CALL OCCURS {_L138_init_aic3106_registers} {0}  ; |617| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 619,column 3,is_stmt
$C$DW$183	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$183, DW_AT_low_pc(0x00)
	.dwattr $C$DW$183, DW_AT_name("_L138_init_mcasp_poll")
	.dwattr $C$DW$183, DW_AT_TI_call
           CALLP   .S2     _L138_init_mcasp_poll,B3
$C$RL63:   ; CALL OCCURS {_L138_init_mcasp_poll} {0}  ; |619| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 621,column 3,is_stmt
           ZERO    .L2     B4
           SET     .S2     B4,0x4,0xf,B4
           MVC     .S2     B4,ICR            ; |621| 
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 521,column 3,is_stmt
           MVK     .L1     0x1,A6            ; |521| 
           ZERO    .L1     A4                ; |521| 
$C$DW$184	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$184, DW_AT_low_pc(0x00)
	.dwattr $C$DW$184, DW_AT_name("_GPIO_setDir")
	.dwattr $C$DW$184, DW_AT_TI_call

           CALLP   .S2     _GPIO_setDir,B3
||         MV      .L2X    A6,B4             ; |521| 

$C$RL64:   ; CALL OCCURS {_GPIO_setDir} {0}  ; |521| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 522,column 3,is_stmt
$C$DW$185	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$185, DW_AT_low_pc(0x00)
	.dwattr $C$DW$185, DW_AT_name("_GPIO_setDir")
	.dwattr $C$DW$185, DW_AT_TI_call

           CALLP   .S2     _GPIO_setDir,B3
||         MVK     .L1     0x1,A6            ; |522| 
||         ZERO    .S1     A4                ; |522| 
||         MVK     .L2     0x2,B4            ; |522| 

$C$RL65:   ; CALL OCCURS {_GPIO_setDir} {0}  ; |522| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 523,column 3,is_stmt
$C$DW$186	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$186, DW_AT_low_pc(0x00)
	.dwattr $C$DW$186, DW_AT_name("_GPIO_setDir")
	.dwattr $C$DW$186, DW_AT_TI_call

           CALLP   .S2     _GPIO_setDir,B3
||         ZERO    .L1     A4                ; |523| 
||         MVK     .L2     0x3,B4            ; |523| 
||         MVK     .S1     0x1,A6            ; |523| 

$C$RL66:   ; CALL OCCURS {_GPIO_setDir} {0}  ; |523| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 524,column 3,is_stmt
$C$DW$187	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$187, DW_AT_low_pc(0x00)
	.dwattr $C$DW$187, DW_AT_name("_GPIO_setDir")
	.dwattr $C$DW$187, DW_AT_TI_call

           CALLP   .S2     _GPIO_setDir,B3
||         ZERO    .L1     A4                ; |524| 
||         MVK     .L2     0x4,B4            ; |524| 
||         MVK     .S1     0x1,A6            ; |524| 

$C$RL67:   ; CALL OCCURS {_GPIO_setDir} {0}  ; |524| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 623,column 1,is_stmt
           LDDW    .D2T1   *++SP,A11:A10
	.dwcfi	cfa_offset, 16
	.dwcfi	restore_reg, 11
	.dwcfi	restore_reg, 10
           LDDW    .D2T1   *++SP,A13:A12
	.dwcfi	cfa_offset, 8
	.dwcfi	restore_reg, 13
	.dwcfi	restore_reg, 12
           LDW     .D2T2   *++SP(8),B3       ; |623| 
           NOP             4
	.dwcfi	cfa_offset, 0
	.dwcfi	restore_reg, 19
	.dwcfi	cfa_offset, 0
$C$DW$188	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$188, DW_AT_low_pc(0x00)
	.dwattr $C$DW$188, DW_AT_TI_return
           RETNOP  .S2     B3,5
           ; BRANCH OCCURS {B3}  
	.dwattr $C$DW$169, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$169, DW_AT_TI_end_line(0x26f)
	.dwattr $C$DW$169, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$169

	.sect	".text"
	.clink
	.global	_L138_init_mcasp_intr

$C$DW$189	.dwtag  DW_TAG_subprogram, DW_AT_name("L138_init_mcasp_intr")
	.dwattr $C$DW$189, DW_AT_low_pc(_L138_init_mcasp_intr)
	.dwattr $C$DW$189, DW_AT_high_pc(0x00)
	.dwattr $C$DW$189, DW_AT_TI_symbol_name("_L138_init_mcasp_intr")
	.dwattr $C$DW$189, DW_AT_external
	.dwattr $C$DW$189, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$189, DW_AT_TI_begin_line(0x105)
	.dwattr $C$DW$189, DW_AT_TI_begin_column(0x06)
	.dwattr $C$DW$189, DW_AT_TI_max_frame_size(0x00)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 262,column 1,is_stmt,address _L138_init_mcasp_intr

	.dwfde $C$DW$CIE, _L138_init_mcasp_intr

;******************************************************************************
;* FUNCTION NAME: L138_init_mcasp_intr                                        *
;*                                                                            *
;*   Regs Modified     : A0,A3,A4,A5,A6,A7,A8,A9,B0,B4,B5,B6,B7,B8,B9         *
;*   Regs Used         : A0,A3,A4,A5,A6,A7,A8,A9,B0,B3,B4,B5,B6,B7,B8,B9      *
;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_L138_init_mcasp_intr:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 265,column 4,is_stmt

           MVKL    .S1     0x1d00044,A4
||         ZERO    .L1     A3                ; |265| 

           MVKH    .S1     0x1d00044,A4
           STW     .D1T1   A3,*A4            ; |265| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 268,column 4,is_stmt

           ADDAD   .D1     A4,4,A7
||         MVK     .L2     0xffffffff,B4     ; |268| 

           STW     .D1T2   B4,*A7            ; |268| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 269,column 4,is_stmt

           MVKL    .S2     0x80f8,B5
||         ADD     .L1     4,A7,A4

           MVKH    .S2     0x80f8,B5
           STW     .D1T2   B5,*A4            ; |269| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 270,column 4,is_stmt
           ADD     .L1     4,A4,A4
           STW     .D1T1   A3,*A4            ; |270| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 271,column 4,is_stmt
           ADD     .L1     4,A4,A4
           STW     .D1T1   A3,*A4            ; |271| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 272,column 4,is_stmt
           ADD     .L1     4,A4,A4
           STW     .D1T1   A3,*A4            ; |272| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 273,column 4,is_stmt

           ADD     .L1     4,A4,A4
||         MVK     .S1     0x1,A5            ; |273| 

           STW     .D1T1   A5,*A4            ; |273| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 274,column 4,is_stmt
           ADD     .L2X    4,A4,B8
           STW     .D2T1   A3,*B8            ; |274| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 275,column 4,is_stmt
           ADDAW   .D2     B8,3,B7
           STW     .D2T1   A3,*B7            ; |275| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 278,column 4,is_stmt
           ADDAW   .D2     B7,7,B6
           STW     .D2T2   B4,*B6            ; |278| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 279,column 4,is_stmt
           ADD     .L2     4,B6,B4
           STW     .D2T2   B5,*B4            ; |279| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 280,column 4,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T1   A3,*B4            ; |280| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 281,column 4,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T1   A3,*B4            ; |281| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 282,column 4,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T1   A3,*B4            ; |282| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 283,column 4,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T1   A5,*B4            ; |283| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 284,column 4,is_stmt

           ADD     .L2     4,B4,B5
||         MVK     .S2     32,B4             ; |284| 

           STW     .D2T2   B4,*B5            ; |284| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 285,column 4,is_stmt
           ADDAW   .D2     B5,3,B4
           STW     .D2T1   A3,*B4            ; |285| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 287,column 4,is_stmt

           MVK     .S1     236,A4
||         MVK     .L2     13,B7             ; |287| 

           ADD     .L1X    B4,A4,A4
           STW     .D1T2   B7,*A4            ; |287| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 288,column 4,is_stmt

           ADD     .L2X    4,A4,B7
||         MVK     .S2     14,B9             ; |288| 

           STW     .D2T2   B9,*B7            ; |288| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 291,column 4,is_stmt
           MVK     .S2     184,B9
           SUB     .L2     B4,B9,B9
           STW     .D2T1   A3,*B9            ; |291| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 292,column 4,is_stmt

           ADD     .L2     4,B9,B4
||         MVK     .S2     8192,B9           ; |292| 

           STW     .D2T2   B9,*B4            ; |292| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 295,column 4,is_stmt
           MVK     .S1     60,A4
           ADD     .L1X    B4,A4,A4
           STW     .D1T1   A3,*A4            ; |295| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 296,column 4,is_stmt
           ADD     .L1     -4,A4,A4
           STW     .D1T1   A3,*A4            ; |296| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 297,column 4,is_stmt
           ADD     .L1     -4,A4,A4
           STW     .D1T1   A3,*A4            ; |297| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 301,column 4,is_stmt
           ADD     .L2     -4,B6,B4
           LDW     .D2T2   *B4,B6            ; |301| 
           NOP             4
           SET     .S2     B6,9,9,B6         ; |301| 
           STW     .D2T2   B6,*B4            ; |301| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 302,column 11,is_stmt
           MV      .L1X    B4,A9
           LDW     .D1T1   *A9,A3            ; |302| 
           NOP             4
           EXTU    .S1     A3,22,31,A0       ; |302| 
   [ A0]   BNOP    .S1     $C$L80,5          ; |302| 
           ; BRANCHCC OCCURS {$C$L80}        ; |302| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 301,column 4,is_stmt
           ZERO    .L1     A0
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 302
;*      Loop opening brace source line   : 302
;*      Loop closing brace source line   : 302
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 1
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       0     
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Did not find schedule
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Did not find schedule
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Did not find schedule
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L77:    ; PIPED LOOP PROLOG
   [!A0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L78:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_intr$4$B:
           NOP             2

           SPMASK          L1
||         MV      .L1     A9,A5             ; |301| 

   [!A0]   LDW     .D1T1   *A5,A4            ; |302| (P) <0,3>  ^ 
           NOP             2

           SPMASK          S1
||         MVK     .S1     0x200,A6          ; |301| 

           NOP             1
           AND     .L1     A6,A4,A3          ; |302| <0,8>  ^ 
           MV      .L1     A3,A0             ; |302| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_intr$4$E:
;** --------------------------------------------------------------------------*
$C$L79:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L80:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 303,column 4,is_stmt

           ADD     .L1     -4,A7,A8
||         ADD     .S1     -4,A7,A7

           LDW     .D1T1   *A7,A5            ; |303| 
           NOP             4
           OR      .L1     2,A5,A5           ; |303| 
           STW     .D1T1   A5,*A8            ; |303| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 304,column 11,is_stmt
           LDW     .D1T1   *A8,A5            ; |304| 
           NOP             4
           AND     .L1     2,A5,A0           ; |304| 

   [ A0]   BNOP    .S1     $C$L84,5          ; |304| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L84}        ; |304| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 304
;*      Loop opening brace source line   : 304
;*      Loop closing brace source line   : 304
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L81:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L82:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_intr$8$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A7,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |304| (P) <0,3>  ^ 
           NOP             4
           AND     .L1     2,A3,A0           ; |304| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |304| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_intr$8$E:
;** --------------------------------------------------------------------------*
$C$L83:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
           MV      .L1     A4,A7
;** --------------------------------------------------------------------------*
$C$L84:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 306,column 4,is_stmt

           ZERO    .L2     B4
||         ADD     .S2     4,B5,B5

           SET     .S2     B4,0x0,0xf,B4
           STW     .D2T2   B4,*B5            ; |306| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 307,column 4,is_stmt
           ADD     .L2     4,B8,B5
           STW     .D2T2   B4,*B5            ; |307| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 310,column 4,is_stmt
           LDW     .D1T1   *A9,A5            ; |310| 
           NOP             4
           SET     .S1     A5,10,10,A5       ; |310| 
           STW     .D1T1   A5,*A9            ; |310| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 311,column 11,is_stmt
           LDW     .D1T1   *A9,A5            ; |311| 
           NOP             4
           EXTU    .S1     A5,21,31,A0       ; |311| 
   [ A0]   BNOP    .S1     $C$L88,5          ; |311| 
           ; BRANCHCC OCCURS {$C$L88}        ; |311| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 310,column 4,is_stmt
           ZERO    .L1     A0
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 311
;*      Loop opening brace source line   : 311
;*      Loop closing brace source line   : 311
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 1
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       0     
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Did not find schedule
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Did not find schedule
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Did not find schedule
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L85:    ; PIPED LOOP PROLOG
   [!A0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L86:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_intr$14$B:
           NOP             2

           SPMASK          L1
||         MV      .L1     A9,A5             ; |310| 

   [!A0]   LDW     .D1T1   *A5,A4            ; |311| (P) <0,3>  ^ 
           NOP             2

           SPMASK          S1
||         MVK     .S1     0x400,A6          ; |310| 

           NOP             1
           AND     .L1     A6,A4,A3          ; |311| <0,8>  ^ 
           MV      .L1     A3,A0             ; |311| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_intr$14$E:
;** --------------------------------------------------------------------------*
$C$L87:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L88:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 312,column 4,is_stmt
           LDW     .D1T1   *A8,A5            ; |312| 
           NOP             4
           OR      .L1     4,A5,A5           ; |312| 
           STW     .D1T1   A5,*A8            ; |312| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 313,column 11,is_stmt
           LDW     .D1T1   *A8,A5            ; |313| 
           NOP             4
           AND     .L1     4,A5,A0           ; |313| 

   [ A0]   BNOP    .S1     $C$L92,5          ; |313| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L92}        ; |313| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 313
;*      Loop opening brace source line   : 313
;*      Loop closing brace source line   : 313
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L89:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L90:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_intr$18$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A7,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |313| (P) <0,3>  ^ 
           NOP             4
           AND     .L1     4,A3,A0           ; |313| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |313| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_intr$18$E:
;** --------------------------------------------------------------------------*
$C$L91:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
           MV      .L1     A4,A7
;** --------------------------------------------------------------------------*
$C$L92:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 316,column 4,is_stmt

           ADDAW   .D2     B7,31,B4
||         ZERO    .L2     B5                ; |316| 

           STW     .D2T2   B5,*B4            ; |316| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 317,column 4,is_stmt
           MVK     .S1     132,A5
           ADD     .L1X    B4,A5,A5
           STW     .D1T2   B5,*A5            ; |317| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 319,column 4,is_stmt
           LDW     .D1T1   *A9,A6            ; |319| 
           MV      .L1     A9,A5
           NOP             3
           SET     .S1     A6,11,11,A6       ; |319| 
           STW     .D1T1   A6,*A5            ; |319| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 320,column 11,is_stmt
           LDW     .D1T1   *A9,A5            ; |320| 
           NOP             4
           EXTU    .S1     A5,20,31,A0       ; |320| 
   [ A0]   BNOP    .S1     $C$L96,5          ; |320| 
           ; BRANCHCC OCCURS {$C$L96}        ; |320| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 319,column 4,is_stmt
           MV      .L1X    B5,A0             ; |319| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 320
;*      Loop opening brace source line   : 320
;*      Loop closing brace source line   : 320
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 1
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       0     
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Did not find schedule
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Did not find schedule
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Did not find schedule
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L93:    ; PIPED LOOP PROLOG
   [!A0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L94:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_intr$24$B:
           NOP             2

           SPMASK          L1
||         MV      .L1     A9,A5             ; |319| 

   [!A0]   LDW     .D1T1   *A5,A4            ; |320| (P) <0,3>  ^ 
           NOP             2

           SPMASK          S1
||         MVK     .S1     0x800,A6          ; |319| 

           NOP             1
           AND     .L1     A6,A4,A3          ; |320| <0,8>  ^ 
           MV      .L1     A3,A0             ; |320| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_intr$24$E:
;** --------------------------------------------------------------------------*
$C$L95:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L96:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 321,column 4,is_stmt
           LDW     .D1T1   *A8,A5            ; |321| 
           NOP             4
           OR      .L1     8,A5,A5           ; |321| 
           STW     .D1T1   A5,*A8            ; |321| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 322,column 11,is_stmt
           LDW     .D1T1   *A8,A5            ; |322| 
           NOP             4
           AND     .L1     8,A5,A0           ; |322| 

   [ A0]   BNOP    .S1     $C$L100,5         ; |322| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L100}       ; |322| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 322
;*      Loop opening brace source line   : 322
;*      Loop closing brace source line   : 322
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L97:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L98:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_intr$28$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A7,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |322| (P) <0,3>  ^ 
           NOP             4
           AND     .L1     8,A3,A0           ; |322| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |322| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_intr$28$E:
;** --------------------------------------------------------------------------*
$C$L99:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
           MV      .L1     A4,A7
;** --------------------------------------------------------------------------*
$C$L100:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 324,column 4,is_stmt
           MV      .L1     A9,A5
           LDW     .D1T1   *A5,A6            ; |324| 
           NOP             4
           SET     .S1     A6,12,12,A6       ; |324| 
           STW     .D1T1   A6,*A5            ; |324| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 325,column 11,is_stmt
           LDW     .D1T1   *A5,A6            ; |325| 
           NOP             4
           EXTU    .S1     A6,19,31,A0       ; |325| 
   [ A0]   BNOP    .S1     $C$L104,5         ; |325| 
           ; BRANCHCC OCCURS {$C$L104}       ; |325| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 324,column 4,is_stmt
           ZERO    .L1     A0
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 325
;*      Loop opening brace source line   : 325
;*      Loop closing brace source line   : 325
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 1
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       0     
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Did not find schedule
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Did not find schedule
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Did not find schedule
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L101:    ; PIPED LOOP PROLOG
   [!A0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L102:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_intr$34$B:
           NOP             3
   [!A0]   LDW     .D1T1   *A5,A4            ; |325| (P) <0,3>  ^ 
           NOP             2

           SPMASK          S1
||         MVK     .S1     0x1000,A6         ; |324| 

           NOP             1
           AND     .L1     A6,A4,A3          ; |325| <0,8>  ^ 
           MV      .L1     A3,A0             ; |325| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_intr$34$E:
;** --------------------------------------------------------------------------*
$C$L103:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L104:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 326,column 4,is_stmt
           LDW     .D1T1   *A8,A4            ; |326| 
           NOP             4
           SET     .S1     A4,4,4,A4         ; |326| 
           STW     .D1T1   A4,*A8            ; |326| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 327,column 11,is_stmt
           LDW     .D1T1   *A8,A4            ; |327| 
           NOP             4
           EXTU    .S1     A4,27,31,A0       ; |327| 

   [ A0]   BNOP    .S1     $C$L108,5         ; |327| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L108}       ; |327| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 327
;*      Loop opening brace source line   : 327
;*      Loop closing brace source line   : 327
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     1*       0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          1        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             1*       0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L105:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L106:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_intr$38$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A7,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |327| (P) <0,3>  ^ 
           NOP             4
           EXTU    .S1     A3,27,31,A0       ; |327| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |327| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_intr$38$E:
;** --------------------------------------------------------------------------*
$C$L107:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L108:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 333,column 1,is_stmt
	.dwcfi	cfa_offset, 0
$C$DW$190	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$190, DW_AT_low_pc(0x00)
	.dwattr $C$DW$190, DW_AT_TI_return
           RETNOP  .S2     B3,5              ; |333| 
           ; BRANCH OCCURS {B3}              ; |333| 

$C$DW$191	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$191, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L106:1:1589536273")
	.dwattr $C$DW$191, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$191, DW_AT_TI_begin_line(0x147)
	.dwattr $C$DW$191, DW_AT_TI_end_line(0x147)
$C$DW$192	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$192, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_intr$38$B)
	.dwattr $C$DW$192, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_intr$38$E)
	.dwendtag $C$DW$191


$C$DW$193	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$193, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L102:1:1589536273")
	.dwattr $C$DW$193, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$193, DW_AT_TI_begin_line(0x145)
	.dwattr $C$DW$193, DW_AT_TI_end_line(0x145)
$C$DW$194	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$194, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_intr$34$B)
	.dwattr $C$DW$194, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_intr$34$E)
	.dwendtag $C$DW$193


$C$DW$195	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$195, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L98:1:1589536273")
	.dwattr $C$DW$195, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$195, DW_AT_TI_begin_line(0x142)
	.dwattr $C$DW$195, DW_AT_TI_end_line(0x142)
$C$DW$196	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$196, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_intr$28$B)
	.dwattr $C$DW$196, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_intr$28$E)
	.dwendtag $C$DW$195


$C$DW$197	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$197, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L94:1:1589536273")
	.dwattr $C$DW$197, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$197, DW_AT_TI_begin_line(0x140)
	.dwattr $C$DW$197, DW_AT_TI_end_line(0x140)
$C$DW$198	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$198, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_intr$24$B)
	.dwattr $C$DW$198, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_intr$24$E)
	.dwendtag $C$DW$197


$C$DW$199	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$199, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L90:1:1589536273")
	.dwattr $C$DW$199, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$199, DW_AT_TI_begin_line(0x139)
	.dwattr $C$DW$199, DW_AT_TI_end_line(0x139)
$C$DW$200	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$200, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_intr$18$B)
	.dwattr $C$DW$200, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_intr$18$E)
	.dwendtag $C$DW$199


$C$DW$201	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$201, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L86:1:1589536273")
	.dwattr $C$DW$201, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$201, DW_AT_TI_begin_line(0x137)
	.dwattr $C$DW$201, DW_AT_TI_end_line(0x137)
$C$DW$202	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$202, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_intr$14$B)
	.dwattr $C$DW$202, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_intr$14$E)
	.dwendtag $C$DW$201


$C$DW$203	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$203, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L82:1:1589536273")
	.dwattr $C$DW$203, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$203, DW_AT_TI_begin_line(0x130)
	.dwattr $C$DW$203, DW_AT_TI_end_line(0x130)
$C$DW$204	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$204, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_intr$8$B)
	.dwattr $C$DW$204, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_intr$8$E)
	.dwendtag $C$DW$203


$C$DW$205	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$205, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L78:1:1589536273")
	.dwattr $C$DW$205, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$205, DW_AT_TI_begin_line(0x12e)
	.dwattr $C$DW$205, DW_AT_TI_end_line(0x12e)
$C$DW$206	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$206, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_intr$4$B)
	.dwattr $C$DW$206, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_intr$4$E)
	.dwendtag $C$DW$205

	.dwattr $C$DW$189, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$189, DW_AT_TI_end_line(0x14d)
	.dwattr $C$DW$189, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$189

	.sect	".text"
	.clink
	.global	_L138_initialise_intr

$C$DW$207	.dwtag  DW_TAG_subprogram, DW_AT_name("L138_initialise_intr")
	.dwattr $C$DW$207, DW_AT_low_pc(_L138_initialise_intr)
	.dwattr $C$DW$207, DW_AT_high_pc(0x00)
	.dwattr $C$DW$207, DW_AT_TI_symbol_name("_L138_initialise_intr")
	.dwattr $C$DW$207, DW_AT_external
	.dwattr $C$DW$207, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$207, DW_AT_TI_begin_line(0x273)
	.dwattr $C$DW$207, DW_AT_TI_begin_column(0x06)
	.dwattr $C$DW$207, DW_AT_TI_max_frame_size(0x20)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 628,column 1,is_stmt,address _L138_initialise_intr

	.dwfde $C$DW$CIE, _L138_initialise_intr
$C$DW$208	.dwtag  DW_TAG_formal_parameter, DW_AT_name("fs")
	.dwattr $C$DW$208, DW_AT_TI_symbol_name("_fs")
	.dwattr $C$DW$208, DW_AT_type(*$C$DW$T$60)
	.dwattr $C$DW$208, DW_AT_location[DW_OP_reg4]
$C$DW$209	.dwtag  DW_TAG_formal_parameter, DW_AT_name("adc_gain")
	.dwattr $C$DW$209, DW_AT_TI_symbol_name("_adc_gain")
	.dwattr $C$DW$209, DW_AT_type(*$C$DW$T$62)
	.dwattr $C$DW$209, DW_AT_location[DW_OP_reg20]
$C$DW$210	.dwtag  DW_TAG_formal_parameter, DW_AT_name("dac_atten")
	.dwattr $C$DW$210, DW_AT_TI_symbol_name("_dac_atten")
	.dwattr $C$DW$210, DW_AT_type(*$C$DW$T$62)
	.dwattr $C$DW$210, DW_AT_location[DW_OP_reg6]
$C$DW$211	.dwtag  DW_TAG_formal_parameter, DW_AT_name("input_type")
	.dwattr $C$DW$211, DW_AT_TI_symbol_name("_input_type")
	.dwattr $C$DW$211, DW_AT_type(*$C$DW$T$66)
	.dwattr $C$DW$211, DW_AT_location[DW_OP_reg22]

;******************************************************************************
;* FUNCTION NAME: L138_initialise_intr                                        *
;*                                                                            *
;*   Regs Modified     : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,A14,B0,*
;*                           B1,B2,B3,B4,B5,B6,B7,B8,B9,SP,A16,A17,A18,A19,   *
;*                           A20,A21,A22,A23,A24,A25,A26,A27,A28,A29,A30,A31, *
;*                           B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27, *
;*                           B28,B29,B30,B31                                  *
;*   Regs Used         : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,A14,B0,*
;*                           B1,B2,B3,B4,B5,B6,B7,B8,B9,DP,SP,A16,A17,A18,A19,*
;*                           A20,A21,A22,A23,A24,A25,A26,A27,A28,A29,A30,A31, *
;*                           B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27, *
;*                           B28,B29,B30,B31                                  *
;*   Local Frame Size  : 0 Args + 0 Auto + 32 Save = 32 byte                  *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_L138_initialise_intr:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
           STW     .D2T2   B3,*SP--(8)       ; |628| 
	.dwcfi	cfa_offset, 8
	.dwcfi	save_reg_to_mem, 19, 0
           STW     .D2T1   A14,*SP--(8)      ; |628| 
	.dwcfi	cfa_offset, 16
	.dwcfi	save_reg_to_mem, 14, -8
           STDW    .D2T1   A13:A12,*SP--     ; |628| 
	.dwcfi	cfa_offset, 24
	.dwcfi	save_reg_to_mem, 13, -12
	.dwcfi	save_reg_to_mem, 12, -16
           STDW    .D2T1   A11:A10,*SP--     ; |628| 
	.dwcfi	cfa_offset, 32
	.dwcfi	save_reg_to_mem, 11, -20
	.dwcfi	save_reg_to_mem, 10, -24
$C$DW$212	.dwtag  DW_TAG_variable, DW_AT_name("fs")
	.dwattr $C$DW$212, DW_AT_TI_symbol_name("_fs")
	.dwattr $C$DW$212, DW_AT_type(*$C$DW$T$86)
	.dwattr $C$DW$212, DW_AT_location[DW_OP_reg14]
$C$DW$213	.dwtag  DW_TAG_variable, DW_AT_name("adc_gain")
	.dwattr $C$DW$213, DW_AT_TI_symbol_name("_adc_gain")
	.dwattr $C$DW$213, DW_AT_type(*$C$DW$T$82)
	.dwattr $C$DW$213, DW_AT_location[DW_OP_reg13]
$C$DW$214	.dwtag  DW_TAG_variable, DW_AT_name("dac_atten")
	.dwattr $C$DW$214, DW_AT_TI_symbol_name("_dac_atten")
	.dwattr $C$DW$214, DW_AT_type(*$C$DW$T$82)
	.dwattr $C$DW$214, DW_AT_location[DW_OP_reg12]
$C$DW$215	.dwtag  DW_TAG_variable, DW_AT_name("input_type")
	.dwattr $C$DW$215, DW_AT_TI_symbol_name("_input_type")
	.dwattr $C$DW$215, DW_AT_type(*$C$DW$T$70)
	.dwattr $C$DW$215, DW_AT_location[DW_OP_reg11]
           MV      .L1X    B4,A13            ; |628| 

           MV      .L1     A4,A14            ; |628| 
||         MV      .S1     A6,A12            ; |628| 
||         MV      .D1X    B6,A11            ; |628| 

	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 630,column 3,is_stmt
           ZERO    .L2     B4                ; |630| 
           STW     .D2T2   B4,*+DP(_poll)    ; |630| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 632,column 3,is_stmt
$C$DW$216	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$216, DW_AT_low_pc(0x00)
	.dwattr $C$DW$216, DW_AT_name("_USTIMER_init")
	.dwattr $C$DW$216, DW_AT_TI_call
           CALLP   .S2     _USTIMER_init,B3
$C$RL68:   ; CALL OCCURS {_USTIMER_init} {0}  ; |632| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 634,column 3,is_stmt
           MVKL    .S1     0x1e27000,A4
$C$DW$217	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$217, DW_AT_low_pc(0x00)
	.dwattr $C$DW$217, DW_AT_name("_EVMOMAPL138_lpscTransition")
	.dwattr $C$DW$217, DW_AT_TI_call

           CALLP   .S2     _EVMOMAPL138_lpscTransition,B3
||         MVKH    .S1     0x1e27000,A4
||         MVK     .L2     0x1,B4            ; |634| 
||         MVK     .L1     0x7,A6            ; |634| 
||         MVK     .D2     0x3,B6            ; |634| 

$C$RL69:   ; CALL OCCURS {_EVMOMAPL138_lpscTransition} {0}  ; |634| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 635,column 3,is_stmt
           ZERO    .L2     B4

           MVKL    .S1     0x1111111,A6
||         SET     .S2     B4,0x0,0x1b,B4

$C$DW$218	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$218, DW_AT_low_pc(0x00)
	.dwattr $C$DW$218, DW_AT_name("_EVMOMAPL138_pinmuxConfig")
	.dwattr $C$DW$218, DW_AT_TI_call

           CALLP   .S2     _EVMOMAPL138_pinmuxConfig,B3
||         MVKH    .S1     0x1111111,A6
||         ZERO    .L1     A4                ; |635| 

$C$RL70:   ; CALL OCCURS {_EVMOMAPL138_pinmuxConfig} {0}  ; |635| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 636,column 3,is_stmt
           ZERO    .L2     B4

           MVKL    .S1     0x8888110,A6
||         SET     .S2     B4,0x4,0x1b,B4

$C$DW$219	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$219, DW_AT_low_pc(0x00)
	.dwattr $C$DW$219, DW_AT_name("_EVMOMAPL138_pinmuxConfig")
	.dwattr $C$DW$219, DW_AT_TI_call

           CALLP   .S2     _EVMOMAPL138_pinmuxConfig,B3
||         MVKH    .S1     0x8888110,A6
||         MVK     .L1     0x1,A4            ; |636| 

$C$RL71:   ; CALL OCCURS {_EVMOMAPL138_pinmuxConfig} {0}  ; |636| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 638,column 3,is_stmt
           MVKL    .S1     0x1c22024,A3

           MVKH    .S1     0x1c22024,A3
||         ZERO    .L1     A10               ; |638| 

           STW     .D1T1   A10,*A3           ; |638| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 639,column 3,is_stmt
           MVK     .S2     12,B4

           ADD     .L2X    A3,B4,B4
||         MVK     .S2     2,B5              ; |639| 

           STW     .D2T2   B5,*B4            ; |639| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 640,column 3,is_stmt
           MVK     .S1     36,A4

           SUB     .L1X    B4,A4,A4
||         MVK     .L2     0x5,B4            ; |640| 

           STW     .D1T2   B4,*A4            ; |640| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 641,column 3,is_stmt
           ADD     .L1     4,A4,A4
           STW     .D1T2   B4,*A4            ; |641| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 642,column 3,is_stmt
           LDW     .D1T1   *A3,A4            ; |642| 
           NOP             4
           SET     .S1     A4,5,5,A4         ; |642| 
           STW     .D1T1   A4,*A3            ; |642| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 644,column 3,is_stmt
           MV      .L2X    A10,B4
           MVC     .S2     B4,CSR            ; |644| 
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 648,column 3,is_stmt
           MV      .L2X    A13,B4            ; |648| 
$C$DW$220	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$220, DW_AT_low_pc(0x00)
	.dwattr $C$DW$220, DW_AT_name("_L138_init_aic3106_registers")
	.dwattr $C$DW$220, DW_AT_TI_call

           CALLP   .S2     _L138_init_aic3106_registers,B3
||         MV      .L2X    A11,B6            ; |648| 
||         MV      .L1     A12,A6            ; |648| 
||         MV      .S1     A14,A4            ; |648| 

$C$RL72:   ; CALL OCCURS {_L138_init_aic3106_registers} {0}  ; |648| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 265,column 4,is_stmt
           MVKL    .S1     0x1d00044,A3
           MVKH    .S1     0x1d00044,A3
           STW     .D1T1   A10,*A3           ; |265| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 268,column 4,is_stmt

           MVK     .L2     0xffffffff,B4     ; |268| 
||         ADDAD   .D1     A3,4,A7

           STW     .D1T2   B4,*A7            ; |268| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 269,column 4,is_stmt

           MVKL    .S2     0x80f8,B5
||         ADD     .L1     4,A7,A3

           MVKH    .S2     0x80f8,B5
           STW     .D1T2   B5,*A3            ; |269| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 270,column 4,is_stmt
           ADD     .L1     4,A3,A3
           STW     .D1T1   A10,*A3           ; |270| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 271,column 4,is_stmt
           ADD     .L1     4,A3,A3
           STW     .D1T1   A10,*A3           ; |271| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 272,column 4,is_stmt
           ADD     .L1     4,A3,A3
           STW     .D1T1   A10,*A3           ; |272| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 273,column 4,is_stmt

           ADD     .L1     4,A3,A4
||         MVK     .S1     0x1,A3            ; |273| 

           STW     .D1T1   A3,*A4            ; |273| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 274,column 4,is_stmt
           ADD     .L2X    4,A4,B7
           STW     .D2T1   A10,*B7           ; |274| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 275,column 4,is_stmt
           ADDAW   .D2     B7,3,B8
           STW     .D2T1   A10,*B8           ; |275| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 278,column 4,is_stmt
           ADDAW   .D2     B8,7,B6
           STW     .D2T2   B4,*B6            ; |278| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 279,column 4,is_stmt
           ADD     .L2     4,B6,B4
           STW     .D2T2   B5,*B4            ; |279| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 280,column 4,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T1   A10,*B4           ; |280| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 281,column 4,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T1   A10,*B4           ; |281| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 282,column 4,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T1   A10,*B4           ; |282| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 283,column 4,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T1   A3,*B4            ; |283| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 284,column 4,is_stmt

           ADD     .L2     4,B4,B5
||         MVK     .S2     32,B4             ; |284| 

           STW     .D2T2   B4,*B5            ; |284| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 285,column 4,is_stmt
           ADDAW   .D2     B5,3,B4
           STW     .D2T1   A10,*B4           ; |285| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 287,column 4,is_stmt

           MVK     .S1     236,A3
||         MVK     .L2     13,B8             ; |287| 

           ADD     .L1X    B4,A3,A3
           STW     .D1T2   B8,*A3            ; |287| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 288,column 4,is_stmt

           MVK     .L2     14,B9             ; |288| 
||         ADD     .S2X    4,A3,B8

           STW     .D2T2   B9,*B8            ; |288| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 291,column 4,is_stmt
           MVK     .S2     184,B9
           SUB     .L2     B4,B9,B9
           STW     .D2T1   A10,*B9           ; |291| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 292,column 4,is_stmt

           ADD     .L2     4,B9,B4
||         MVK     .S2     8192,B9           ; |292| 

           STW     .D2T2   B9,*B4            ; |292| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 295,column 4,is_stmt
           MVK     .S1     60,A3
           ADD     .L1X    B4,A3,A3
           STW     .D1T1   A10,*A3           ; |295| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 296,column 4,is_stmt
           ADD     .L1     -4,A3,A3
           STW     .D1T1   A10,*A3           ; |296| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 297,column 4,is_stmt
           ADD     .L1     -4,A3,A3
           STW     .D1T1   A10,*A3           ; |297| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 301,column 4,is_stmt
           ADD     .L2     -4,B6,B4
           LDW     .D2T2   *B4,B6            ; |301| 
           NOP             4
           SET     .S2     B6,9,9,B6         ; |301| 
           STW     .D2T2   B6,*B4            ; |301| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 302,column 11,is_stmt
           MV      .L1X    B4,A8
           LDW     .D1T1   *A8,A3            ; |302| 
           NOP             4
           EXTU    .S1     A3,22,31,A0       ; |302| 
   [ A0]   BNOP    .S1     $C$L112,5         ; |302| 
           ; BRANCHCC OCCURS {$C$L112}       ; |302| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 301,column 4,is_stmt
           MV      .L1     A10,A0            ; |301| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 302
;*      Loop opening brace source line   : 302
;*      Loop closing brace source line   : 302
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 1
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       0     
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Did not find schedule
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Did not find schedule
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Did not find schedule
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L109:    ; PIPED LOOP PROLOG
   [!A0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L110:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_initialise_intr$6$B:
           NOP             2

           SPMASK          L1
||         MV      .L1     A8,A5             ; |301| 

   [!A0]   LDW     .D1T1   *A5,A4            ; |302| (P) <0,3>  ^ 
           NOP             2

           SPMASK          S1
||         MVK     .S1     0x200,A6          ; |301| 

           NOP             1
           AND     .L1     A6,A4,A3          ; |302| <0,8>  ^ 
           MV      .L1     A3,A0             ; |302| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_initialise_intr$6$E:
;** --------------------------------------------------------------------------*
$C$L111:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L112:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 303,column 4,is_stmt

           ADD     .L1     -4,A7,A9
||         ADD     .S1     -4,A7,A7

           LDW     .D1T1   *A7,A5            ; |303| 
           NOP             4
           OR      .L1     2,A5,A5           ; |303| 
           STW     .D1T1   A5,*A9            ; |303| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 304,column 11,is_stmt
           LDW     .D1T1   *A9,A5            ; |304| 
           NOP             4
           AND     .L1     2,A5,A0           ; |304| 

   [ A0]   BNOP    .S1     $C$L116,5         ; |304| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L116}       ; |304| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 304
;*      Loop opening brace source line   : 304
;*      Loop closing brace source line   : 304
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L113:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L114:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_initialise_intr$10$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A7,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |304| (P) <0,3>  ^ 
           NOP             4
           AND     .L1     2,A3,A0           ; |304| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |304| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_initialise_intr$10$E:
;** --------------------------------------------------------------------------*
$C$L115:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
           MV      .L1     A4,A7
;** --------------------------------------------------------------------------*
$C$L116:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 306,column 4,is_stmt

           ZERO    .L1     A16
||         ADD     .L2     4,B5,B4

           SET     .S1     A16,0x0,0xf,A16
           STW     .D2T1   A16,*B4           ; |306| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 307,column 4,is_stmt
           ADD     .L2     4,B7,B4
           STW     .D2T1   A16,*B4           ; |307| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 310,column 4,is_stmt
           LDW     .D1T1   *A8,A5            ; |310| 
           NOP             4
           SET     .S1     A5,10,10,A5       ; |310| 
           STW     .D1T1   A5,*A8            ; |310| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 311,column 11,is_stmt
           LDW     .D1T1   *A8,A5            ; |311| 
           NOP             4
           EXTU    .S1     A5,21,31,A0       ; |311| 
   [ A0]   BNOP    .S1     $C$L120,5         ; |311| 
           ; BRANCHCC OCCURS {$C$L120}       ; |311| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 310,column 4,is_stmt
           ZERO    .L1     A0
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 311
;*      Loop opening brace source line   : 311
;*      Loop closing brace source line   : 311
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 1
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       0     
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Did not find schedule
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Did not find schedule
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Did not find schedule
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L117:    ; PIPED LOOP PROLOG
   [!A0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L118:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_initialise_intr$16$B:
           NOP             2

           SPMASK          L1
||         MV      .L1     A8,A5             ; |310| 

   [!A0]   LDW     .D1T1   *A5,A4            ; |311| (P) <0,3>  ^ 
           NOP             2

           SPMASK          S1
||         MVK     .S1     0x400,A6          ; |310| 

           NOP             1
           AND     .L1     A6,A4,A3          ; |311| <0,8>  ^ 
           MV      .L1     A3,A0             ; |311| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_initialise_intr$16$E:
;** --------------------------------------------------------------------------*
$C$L119:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L120:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 312,column 4,is_stmt
           LDW     .D1T1   *A9,A5            ; |312| 
           NOP             4
           OR      .L1     4,A5,A5           ; |312| 
           STW     .D1T1   A5,*A9            ; |312| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 313,column 11,is_stmt
           MV      .L1     A9,A17
           LDW     .D1T1   *A17,A5           ; |313| 
           NOP             4
           AND     .L1     4,A5,A0           ; |313| 

   [ A0]   BNOP    .S1     $C$L124,5         ; |313| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L124}       ; |313| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 313
;*      Loop opening brace source line   : 313
;*      Loop closing brace source line   : 313
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L121:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L122:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_initialise_intr$20$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A7,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |313| (P) <0,3>  ^ 
           NOP             4
           AND     .L1     4,A3,A0           ; |313| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |313| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_initialise_intr$20$E:
;** --------------------------------------------------------------------------*
$C$L123:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
           MV      .L1     A4,A7
;** --------------------------------------------------------------------------*
$C$L124:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 316,column 4,is_stmt

           ADDAW   .D2     B8,31,B4
||         ZERO    .L2     B5                ; |316| 

           STW     .D2T2   B5,*B4            ; |316| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 317,column 4,is_stmt
           MVK     .S1     132,A5
           ADD     .L1X    B4,A5,A5
           STW     .D1T2   B5,*A5            ; |317| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 319,column 4,is_stmt
           LDW     .D1T1   *A8,A6            ; |319| 
           MV      .L1     A8,A5
           NOP             3
           SET     .S1     A6,11,11,A6       ; |319| 
           STW     .D1T1   A6,*A5            ; |319| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 320,column 11,is_stmt
           MV      .L1     A5,A9
           LDW     .D1T1   *A9,A5            ; |320| 
           NOP             4
           EXTU    .S1     A5,20,31,A0       ; |320| 
   [ A0]   BNOP    .S1     $C$L128,5         ; |320| 
           ; BRANCHCC OCCURS {$C$L128}       ; |320| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 319,column 4,is_stmt
           MV      .L1X    B5,A0             ; |319| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 320
;*      Loop opening brace source line   : 320
;*      Loop closing brace source line   : 320
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 1
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       0     
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Did not find schedule
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Did not find schedule
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Did not find schedule
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L125:    ; PIPED LOOP PROLOG
   [!A0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L126:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_initialise_intr$26$B:
           NOP             2

           SPMASK          L1
||         MV      .L1     A9,A5             ; |319| 

   [!A0]   LDW     .D1T1   *A5,A4            ; |320| (P) <0,3>  ^ 
           NOP             2

           SPMASK          S1
||         MVK     .S1     0x800,A6          ; |319| 

           NOP             1
           AND     .L1     A6,A4,A3          ; |320| <0,8>  ^ 
           MV      .L1     A3,A0             ; |320| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_initialise_intr$26$E:
;** --------------------------------------------------------------------------*
$C$L127:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L128:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 321,column 4,is_stmt
           MV      .L1     A17,A5
           LDW     .D1T1   *A5,A5            ; |321| 
           MV      .L1     A17,A8
           NOP             3
           OR      .L1     8,A5,A5           ; |321| 
           STW     .D1T1   A5,*A8            ; |321| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 322,column 11,is_stmt
           LDW     .D1T1   *A8,A5            ; |322| 
           NOP             4
           AND     .L1     8,A5,A0           ; |322| 

   [ A0]   BNOP    .S1     $C$L132,5         ; |322| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L132}       ; |322| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 322
;*      Loop opening brace source line   : 322
;*      Loop closing brace source line   : 322
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L129:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L130:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_initialise_intr$30$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A7,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |322| (P) <0,3>  ^ 
           NOP             4
           AND     .L1     8,A3,A0           ; |322| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |322| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_initialise_intr$30$E:
;** --------------------------------------------------------------------------*
$C$L131:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
           MV      .L1     A4,A7
;** --------------------------------------------------------------------------*
$C$L132:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 324,column 4,is_stmt
           MV      .L1     A9,A5
           LDW     .D1T1   *A5,A6            ; |324| 
           NOP             4
           SET     .S1     A6,12,12,A6       ; |324| 
           STW     .D1T1   A6,*A5            ; |324| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 325,column 11,is_stmt
           LDW     .D1T1   *A5,A6            ; |325| 
           NOP             4
           EXTU    .S1     A6,19,31,A0       ; |325| 
   [ A0]   BNOP    .S1     $C$L136,5         ; |325| 
           ; BRANCHCC OCCURS {$C$L136}       ; |325| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 324,column 4,is_stmt
           ZERO    .L1     A0
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 325
;*      Loop opening brace source line   : 325
;*      Loop closing brace source line   : 325
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 1
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       0     
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Did not find schedule
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Did not find schedule
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Did not find schedule
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L133:    ; PIPED LOOP PROLOG
   [!A0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L134:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_initialise_intr$36$B:
           NOP             3
   [!A0]   LDW     .D1T1   *A5,A4            ; |325| (P) <0,3>  ^ 
           NOP             2

           SPMASK          S1
||         MVK     .S1     0x1000,A6         ; |324| 

           NOP             1
           AND     .L1     A6,A4,A3          ; |325| <0,8>  ^ 
           MV      .L1     A3,A0             ; |325| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_initialise_intr$36$E:
;** --------------------------------------------------------------------------*
$C$L135:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L136:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 326,column 4,is_stmt
           LDW     .D1T1   *A8,A4            ; |326| 
           NOP             4
           SET     .S1     A4,4,4,A4         ; |326| 
           STW     .D1T1   A4,*A8            ; |326| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 327,column 11,is_stmt
           LDW     .D1T1   *A8,A4            ; |327| 
           NOP             4
           EXTU    .S1     A4,27,31,A0       ; |327| 

   [ A0]   BNOP    .S1     $C$L140,5         ; |327| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L140}       ; |327| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 327
;*      Loop opening brace source line   : 327
;*      Loop closing brace source line   : 327
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     1*       0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          1        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             1*       0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L137:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L138:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_initialise_intr$40$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A7,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |327| (P) <0,3>  ^ 
           NOP             4
           EXTU    .S1     A3,27,31,A0       ; |327| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |327| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_initialise_intr$40$E:
;** --------------------------------------------------------------------------*
$C$L139:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L140:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 655,column 3,is_stmt
           MVKL    .S1     0x1800104,A4
           MVK     .S1     61,A3             ; |655| 
           MVKH    .S1     0x1800104,A4
           STW     .D1T1   A3,*A4            ; |655| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 657,column 3,is_stmt
           MVKL    .S1     _vectors,A3
           MVKH    .S1     _vectors,A3
           NOP             1
           MVC     .S2X    A3,ISTP           ; |657| 
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 661,column 3,is_stmt
           MVK     .S1     15,A3
           SUB     .L1     A16,A3,A3
           NOP             1
           MVC     .S2X    A3,ICR            ; |661| 
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 662,column 3,is_stmt
           MVC     .S2     IER,B4            ; |662| 
           MVK     .S1     18,A3             ; |662| 
           NOP             1
           OR      .L2X    A3,B4,B4          ; |662| 
           MVC     .S2     B4,IER            ; |662| 
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 664,column 3,is_stmt
           MVC     .S2     CSR,B4            ; |664| 
           OR      .L2     1,B4,B4           ; |664| 
           MVC     .S2     B4,CSR            ; |664| 
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 521,column 3,is_stmt
           MVK     .L1     0x1,A6            ; |521| 
           ZERO    .L1     A4                ; |521| 
$C$DW$221	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$221, DW_AT_low_pc(0x00)
	.dwattr $C$DW$221, DW_AT_name("_GPIO_setDir")
	.dwattr $C$DW$221, DW_AT_TI_call

           CALLP   .S2     _GPIO_setDir,B3
||         MV      .L2X    A6,B4             ; |521| 

$C$RL73:   ; CALL OCCURS {_GPIO_setDir} {0}  ; |521| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 522,column 3,is_stmt
$C$DW$222	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$222, DW_AT_low_pc(0x00)
	.dwattr $C$DW$222, DW_AT_name("_GPIO_setDir")
	.dwattr $C$DW$222, DW_AT_TI_call

           CALLP   .S2     _GPIO_setDir,B3
||         ZERO    .L1     A4                ; |522| 
||         MVK     .L2     0x2,B4            ; |522| 
||         MVK     .S1     0x1,A6            ; |522| 

$C$RL74:   ; CALL OCCURS {_GPIO_setDir} {0}  ; |522| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 523,column 3,is_stmt
$C$DW$223	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$223, DW_AT_low_pc(0x00)
	.dwattr $C$DW$223, DW_AT_name("_GPIO_setDir")
	.dwattr $C$DW$223, DW_AT_TI_call

           CALLP   .S2     _GPIO_setDir,B3
||         ZERO    .L1     A4                ; |523| 
||         MVK     .L2     0x3,B4            ; |523| 
||         MVK     .S1     0x1,A6            ; |523| 

$C$RL75:   ; CALL OCCURS {_GPIO_setDir} {0}  ; |523| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 524,column 3,is_stmt
$C$DW$224	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$224, DW_AT_low_pc(0x00)
	.dwattr $C$DW$224, DW_AT_name("_GPIO_setDir")
	.dwattr $C$DW$224, DW_AT_TI_call

           CALLP   .S2     _GPIO_setDir,B3
||         ZERO    .L1     A4                ; |524| 
||         MVK     .L2     0x4,B4            ; |524| 
||         MVK     .S1     0x1,A6            ; |524| 

$C$RL76:   ; CALL OCCURS {_GPIO_setDir} {0}  ; |524| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 667,column 1,is_stmt
           LDDW    .D2T1   *++SP,A11:A10
	.dwcfi	cfa_offset, 24
	.dwcfi	restore_reg, 11
	.dwcfi	restore_reg, 10
           LDDW    .D2T1   *++SP,A13:A12
	.dwcfi	cfa_offset, 16
	.dwcfi	restore_reg, 13
	.dwcfi	restore_reg, 12
           LDW     .D2T1   *++SP(8),A14
	.dwcfi	cfa_offset, 8
	.dwcfi	restore_reg, 14
           LDW     .D2T2   *++SP(8),B3       ; |667| 
           NOP             4
	.dwcfi	cfa_offset, 0
	.dwcfi	restore_reg, 19
	.dwcfi	cfa_offset, 0
$C$DW$225	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$225, DW_AT_low_pc(0x00)
	.dwattr $C$DW$225, DW_AT_TI_return
           RETNOP  .S2     B3,5
           ; BRANCH OCCURS {B3}  

$C$DW$226	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$226, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L138:1:1589536273")
	.dwattr $C$DW$226, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$226, DW_AT_TI_begin_line(0x147)
	.dwattr $C$DW$226, DW_AT_TI_end_line(0x147)
$C$DW$227	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$227, DW_AT_low_pc($C$DW$L$_L138_initialise_intr$40$B)
	.dwattr $C$DW$227, DW_AT_high_pc($C$DW$L$_L138_initialise_intr$40$E)
	.dwendtag $C$DW$226


$C$DW$228	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$228, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L134:1:1589536273")
	.dwattr $C$DW$228, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$228, DW_AT_TI_begin_line(0x145)
	.dwattr $C$DW$228, DW_AT_TI_end_line(0x145)
$C$DW$229	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$229, DW_AT_low_pc($C$DW$L$_L138_initialise_intr$36$B)
	.dwattr $C$DW$229, DW_AT_high_pc($C$DW$L$_L138_initialise_intr$36$E)
	.dwendtag $C$DW$228


$C$DW$230	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$230, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L130:1:1589536273")
	.dwattr $C$DW$230, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$230, DW_AT_TI_begin_line(0x142)
	.dwattr $C$DW$230, DW_AT_TI_end_line(0x142)
$C$DW$231	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$231, DW_AT_low_pc($C$DW$L$_L138_initialise_intr$30$B)
	.dwattr $C$DW$231, DW_AT_high_pc($C$DW$L$_L138_initialise_intr$30$E)
	.dwendtag $C$DW$230


$C$DW$232	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$232, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L126:1:1589536273")
	.dwattr $C$DW$232, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$232, DW_AT_TI_begin_line(0x140)
	.dwattr $C$DW$232, DW_AT_TI_end_line(0x140)
$C$DW$233	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$233, DW_AT_low_pc($C$DW$L$_L138_initialise_intr$26$B)
	.dwattr $C$DW$233, DW_AT_high_pc($C$DW$L$_L138_initialise_intr$26$E)
	.dwendtag $C$DW$232


$C$DW$234	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$234, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L122:1:1589536273")
	.dwattr $C$DW$234, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$234, DW_AT_TI_begin_line(0x139)
	.dwattr $C$DW$234, DW_AT_TI_end_line(0x139)
$C$DW$235	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$235, DW_AT_low_pc($C$DW$L$_L138_initialise_intr$20$B)
	.dwattr $C$DW$235, DW_AT_high_pc($C$DW$L$_L138_initialise_intr$20$E)
	.dwendtag $C$DW$234


$C$DW$236	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$236, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L118:1:1589536273")
	.dwattr $C$DW$236, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$236, DW_AT_TI_begin_line(0x137)
	.dwattr $C$DW$236, DW_AT_TI_end_line(0x137)
$C$DW$237	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$237, DW_AT_low_pc($C$DW$L$_L138_initialise_intr$16$B)
	.dwattr $C$DW$237, DW_AT_high_pc($C$DW$L$_L138_initialise_intr$16$E)
	.dwendtag $C$DW$236


$C$DW$238	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$238, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L114:1:1589536273")
	.dwattr $C$DW$238, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$238, DW_AT_TI_begin_line(0x130)
	.dwattr $C$DW$238, DW_AT_TI_end_line(0x130)
$C$DW$239	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$239, DW_AT_low_pc($C$DW$L$_L138_initialise_intr$10$B)
	.dwattr $C$DW$239, DW_AT_high_pc($C$DW$L$_L138_initialise_intr$10$E)
	.dwendtag $C$DW$238


$C$DW$240	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$240, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L110:1:1589536273")
	.dwattr $C$DW$240, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$240, DW_AT_TI_begin_line(0x12e)
	.dwattr $C$DW$240, DW_AT_TI_end_line(0x12e)
$C$DW$241	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$241, DW_AT_low_pc($C$DW$L$_L138_initialise_intr$6$B)
	.dwattr $C$DW$241, DW_AT_high_pc($C$DW$L$_L138_initialise_intr$6$E)
	.dwendtag $C$DW$240

	.dwattr $C$DW$207, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$207, DW_AT_TI_end_line(0x29b)
	.dwattr $C$DW$207, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$207

	.sect	".text"
	.clink
	.global	_EDMA3_PaRAM_setup

$C$DW$242	.dwtag  DW_TAG_subprogram, DW_AT_name("EDMA3_PaRAM_setup")
	.dwattr $C$DW$242, DW_AT_low_pc(_EDMA3_PaRAM_setup)
	.dwattr $C$DW$242, DW_AT_high_pc(0x00)
	.dwattr $C$DW$242, DW_AT_TI_symbol_name("_EDMA3_PaRAM_setup")
	.dwattr $C$DW$242, DW_AT_external
	.dwattr $C$DW$242, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$242, DW_AT_TI_begin_line(0x4b)
	.dwattr $C$DW$242, DW_AT_TI_begin_column(0x06)
	.dwattr $C$DW$242, DW_AT_TI_max_frame_size(0x00)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 76,column 1,is_stmt,address _EDMA3_PaRAM_setup

	.dwfde $C$DW$CIE, _EDMA3_PaRAM_setup

;******************************************************************************
;* FUNCTION NAME: EDMA3_PaRAM_setup                                           *
;*                                                                            *
;*   Regs Modified     : A3,A4,A5,A6,B4,B5,B6,B7,B8,B9,B16,B17                *
;*   Regs Used         : A3,A4,A5,A6,B3,B4,B5,B6,B7,B8,B9,DP,B16,B17          *
;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_EDMA3_PaRAM_setup:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 87,column 1,is_stmt
           MVKL    .S2     0x1c04020,B5

           MVKH    .S2     0x1c04020,B5
||         ZERO    .L2     B17               ; |87| 

           STW     .D2T2   B17,*B5           ; |87| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 88,column 1,is_stmt
           LDW     .D2T2   *+DP(_pingOUT),B4 ; |88| 
           ADD     .L2     4,B5,B5
           NOP             3
           STW     .D2T2   B4,*B5            ; |88| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 89,column 1,is_stmt
           MVKL    .S1     0x400004,A4

           MVKH    .S1     0x400004,A4
||         ADD     .L2     4,B5,B5

           STW     .D2T1   A4,*B5            ; |89| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 91,column 1,is_stmt
           MVKL    .S2     0x1d02000,B8

           MVKH    .S2     0x1d02000,B8
||         ADD     .L2     4,B5,B5

           STW     .D2T2   B8,*B5            ; |91| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 92,column 1,is_stmt

           ADD     .L2     4,B5,B5
||         MVK     .L1     0x4,A5            ; |92| 

           STW     .D2T1   A5,*B5            ; |92| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 93,column 1,is_stmt

           ADD     .L2     4,B5,B5
||         MVK     .S1     0x800,A6          ; |93| 

           STW     .D2T1   A6,*B5            ; |93| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 94,column 1,is_stmt
           ADD     .L2     4,B5,B5
           STW     .D2T2   B17,*B5           ; |94| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 95,column 1,is_stmt

           ADD     .L2     4,B5,B6
||         MVK     .S2     0x1,B5            ; |95| 

           STW     .D2T2   B5,*B6            ; |95| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 101,column 1,is_stmt
           MVKL    .S1     0x1c04800,A3
           MVKH    .S1     0x1c04800,A3
           STW     .D1T2   B17,*A3           ; |101| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 102,column 1,is_stmt
           LDW     .D2T2   *+DP(_pongOUT),B7 ; |102| 
           ADD     .L1     4,A3,A3
           NOP             3
           STW     .D1T2   B7,*A3            ; |102| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 103,column 1,is_stmt
           ADD     .L1     4,A3,A3
           STW     .D1T1   A4,*A3            ; |103| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 104,column 1,is_stmt
           ADD     .L1     4,A3,A3
           STW     .D1T2   B8,*A3            ; |104| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 105,column 1,is_stmt
           ADD     .L1     4,A3,A3
           STW     .D1T1   A5,*A3            ; |105| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 106,column 1,is_stmt

           MVK     .S2     2080,B7           ; |106| 
||         ADD     .L1     4,A3,A3

           STW     .D1T2   B7,*A3            ; |106| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 107,column 1,is_stmt
           ADD     .L1     4,A3,A3
           STW     .D1T2   B17,*A3           ; |107| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 108,column 1,is_stmt
           ADD     .L1     4,A3,A3
           STW     .D1T2   B5,*A3            ; |108| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 114,column 1,is_stmt
           ADD     .L1     4,A3,A3
           STW     .D1T2   B17,*A3           ; |114| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 115,column 1,is_stmt
           ADD     .L1     4,A3,A3
           STW     .D1T2   B4,*A3            ; |115| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 116,column 1,is_stmt
           ADD     .L1     4,A3,A3
           STW     .D1T1   A4,*A3            ; |116| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 117,column 1,is_stmt
           ADD     .L1     4,A3,A3
           STW     .D1T2   B8,*A3            ; |117| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 118,column 1,is_stmt
           ADD     .L1     4,A3,A3
           STW     .D1T1   A5,*A3            ; |118| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 119,column 1,is_stmt
           ADD     .L1     4,A3,A3
           STW     .D1T1   A6,*A3            ; |119| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 120,column 1,is_stmt
           ADD     .L1     4,A3,A3
           STW     .D1T2   B17,*A3           ; |120| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 121,column 1,is_stmt
           ADD     .L1     4,A3,A6
           STW     .D1T2   B5,*A6            ; |121| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 128,column 1,is_stmt

           MVK     .S1     60,A5
||         ZERO    .L1     A3

           SUB     .L1X    B6,A5,A5
||         SET     .S1     A3,0x14,0x14,A3

           STW     .D1T1   A3,*A5            ; |128| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 129,column 1,is_stmt
           ADD     .L1     4,A5,A5
           STW     .D1T2   B8,*A5            ; |129| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 130,column 1,is_stmt
           ADD     .L1     4,A5,A5
           STW     .D1T1   A4,*A5            ; |130| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 131,column 1,is_stmt
           LDW     .D2T2   *+DP(_pingIN),B9  ; |131| 
           ADD     .L1     4,A5,A5
           NOP             3
           STW     .D1T2   B9,*A5            ; |131| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 132,column 1,is_stmt
           ZERO    .L2     B6

           SET     .S2     B6,0x12,0x12,B6
||         ADD     .L1     4,A5,A5

           STW     .D1T2   B6,*A5            ; |132| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 133,column 1,is_stmt

           MVK     .S2     0x860,B7          ; |133| 
||         ADD     .L1     4,A5,A5

           STW     .D1T2   B7,*A5            ; |133| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 134,column 1,is_stmt
           ADD     .L1     4,A5,A5
           STW     .D1T2   B17,*A5           ; |134| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 135,column 1,is_stmt
           ADD     .L1     4,A5,A5
           STW     .D1T2   B5,*A5            ; |135| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 141,column 1,is_stmt

           MVK     .S2     36,B4
||         MVKL    .S1     0x101000,A5

           ADD     .L2X    A6,B4,B4
||         MVKH    .S1     0x101000,A5

           STW     .D2T1   A5,*B4            ; |141| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 142,column 1,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T2   B8,*B4            ; |142| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 143,column 1,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T1   A4,*B4            ; |143| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 144,column 1,is_stmt
           LDW     .D2T2   *+DP(_pongIN),B16 ; |144| 
           ADD     .L2     4,B4,B4
           NOP             3
           STW     .D2T2   B16,*B4           ; |144| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 145,column 1,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T2   B6,*B4            ; |145| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 146,column 1,is_stmt

           MVK     .S2     2176,B16          ; |146| 
||         ADD     .L2     4,B4,B4

           STW     .D2T2   B16,*B4           ; |146| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 147,column 1,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T2   B17,*B4           ; |147| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 148,column 1,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T2   B5,*B4            ; |148| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 154,column 1,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T1   A3,*B4            ; |154| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 155,column 1,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T2   B8,*B4            ; |155| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 156,column 1,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T1   A4,*B4            ; |156| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 157,column 1,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T2   B9,*B4            ; |157| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 158,column 1,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T2   B6,*B4            ; |158| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 159,column 1,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T2   B7,*B4            ; |159| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 160,column 1,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T2   B17,*B4           ; |160| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 161,column 1,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T2   B5,*B4            ; |161| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 164,column 3,is_stmt
           MVKL    .S1     0x1c0105c,A3

           MVKH    .S1     0x1c0105c,A3
||         ADD     .L1X    -2,B5,A4

           STW     .D1T1   A4,*A3            ; |164| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 165,column 3,is_stmt
           MVK     .S2     48,B4
           SUB     .L2X    A3,B4,B4
           STW     .D2T1   A4,*B4            ; |165| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 166,column 3,is_stmt
           ADDAD   .D2     B4,9,B5
           STW     .D2T1   A4,*B5            ; |166| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 167,column 3,is_stmt
           SUBAW   .D2     B5,26,B6
           STW     .D2T1   A4,*B6            ; |167| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 169,column 3,is_stmt
           ADD     .L1     -4,A3,A3
           STW     .D1T1   A4,*A3            ; |169| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 170,column 3,is_stmt
           ADD     .L1X    -4,B4,A3
           STW     .D1T1   A4,*A3            ; |170| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 171,column 3,is_stmt
           ADD     .L2     -4,B5,B5
           STW     .D2T1   A4,*B5            ; |171| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 172,column 3,is_stmt
           ADD     .L2     -4,B6,B5
           STW     .D2T1   A4,*B5            ; |172| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 175,column 1,is_stmt

           MVK     .L1     3,A4              ; |175| 
||         ADD     .S1X    4,B4,A3

           STW     .D1T1   A4,*A3            ; |175| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 176,column 1,is_stmt
	.dwcfi	cfa_offset, 0
$C$DW$243	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$243, DW_AT_low_pc(0x00)
	.dwattr $C$DW$243, DW_AT_TI_return
           RETNOP  .S2     B3,5              ; |176| 
           ; BRANCH OCCURS {B3}              ; |176| 
	.dwattr $C$DW$242, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$242, DW_AT_TI_end_line(0xb0)
	.dwattr $C$DW$242, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$242

	.sect	".text"
	.clink
	.global	_L138_init_mcasp_edma

$C$DW$244	.dwtag  DW_TAG_subprogram, DW_AT_name("L138_init_mcasp_edma")
	.dwattr $C$DW$244, DW_AT_low_pc(_L138_init_mcasp_edma)
	.dwattr $C$DW$244, DW_AT_high_pc(0x00)
	.dwattr $C$DW$244, DW_AT_TI_symbol_name("_L138_init_mcasp_edma")
	.dwattr $C$DW$244, DW_AT_external
	.dwattr $C$DW$244, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$244, DW_AT_TI_begin_line(0xb3)
	.dwattr $C$DW$244, DW_AT_TI_begin_column(0x06)
	.dwattr $C$DW$244, DW_AT_TI_max_frame_size(0x08)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 180,column 1,is_stmt,address _L138_init_mcasp_edma

	.dwfde $C$DW$CIE, _L138_init_mcasp_edma

;******************************************************************************
;* FUNCTION NAME: L138_init_mcasp_edma                                        *
;*                                                                            *
;*   Regs Modified     : A0,A3,A4,A5,A6,A7,A8,A9,B0,B3,B4,B5,B6,B7,B8,B9,SP,  *
;*                           A16,A17,B16,B17,B18                              *
;*   Regs Used         : A0,A3,A4,A5,A6,A7,A8,A9,B0,B3,B4,B5,B6,B7,B8,B9,DP,  *
;*                           SP,A16,A17,B16,B17,B18                           *
;*   Local Frame Size  : 0 Args + 0 Auto + 4 Save = 4 byte                    *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_L138_init_mcasp_edma:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
           STW     .D2T2   B3,*SP--(8)       ; |180| 
	.dwcfi	cfa_offset, 8
	.dwcfi	save_reg_to_mem, 19, 0
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 183,column 4,is_stmt

           MVKL    .S1     0x1d00044,A4
||         ZERO    .L1     A3                ; |183| 

           MVKH    .S1     0x1d00044,A4
           STW     .D1T1   A3,*A4            ; |183| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 186,column 4,is_stmt

           ADDAD   .D1     A4,4,A8
||         MVK     .L2     0xffffffff,B4     ; |186| 

           STW     .D1T2   B4,*A8            ; |186| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 187,column 4,is_stmt

           MVKL    .S2     0x80f0,B5
||         ADD     .L1     4,A8,A4

           MVKH    .S2     0x80f0,B5
           STW     .D1T2   B5,*A4            ; |187| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 188,column 4,is_stmt
           ADD     .L1     4,A4,A4
           STW     .D1T1   A3,*A4            ; |188| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 189,column 4,is_stmt
           ADD     .L1     4,A4,A4
           STW     .D1T1   A3,*A4            ; |189| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 190,column 4,is_stmt
           ADD     .L1     4,A4,A4
           STW     .D1T1   A3,*A4            ; |190| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 191,column 4,is_stmt

           ADD     .L1     4,A4,A4
||         MVK     .L2     0x1,B6            ; |191| 

           STW     .D1T2   B6,*A4            ; |191| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 192,column 4,is_stmt
           ADD     .L2X    4,A4,B18
           STW     .D2T1   A3,*B18           ; |192| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 193,column 4,is_stmt
           ADDAW   .D2     B18,3,B8
           STW     .D2T1   A3,*B8            ; |193| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 196,column 4,is_stmt
           ADDAW   .D2     B8,7,B7
           STW     .D2T2   B4,*B7            ; |196| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 197,column 4,is_stmt
           ADD     .L2     4,B7,B4
           STW     .D2T2   B5,*B4            ; |197| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 198,column 4,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T1   A3,*B4            ; |198| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 199,column 4,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T1   A3,*B4            ; |199| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 200,column 4,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T1   A3,*B4            ; |200| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 201,column 4,is_stmt
           ADD     .L2     4,B4,B4
           STW     .D2T2   B6,*B4            ; |201| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 202,column 4,is_stmt
           ADD     .L1X    4,B4,A16
           STW     .D1T1   A3,*A16           ; |202| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 203,column 4,is_stmt
           MVK     .S2     12,B5
           ADD     .L2X    A16,B5,B5
           STW     .D2T1   A3,*B5            ; |203| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 205,column 4,is_stmt

           MVK     .S1     236,A7
||         MVK     .L2     13,B4             ; |205| 

           ADD     .L1X    B5,A7,A7
           STW     .D1T2   B4,*A7            ; |205| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 206,column 4,is_stmt

           ADD     .L1     4,A7,A4
||         MVK     .S1     14,A5             ; |206| 

           STW     .D1T1   A5,*A4            ; |206| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 209,column 4,is_stmt
           MVK     .S2     184,B4
           SUB     .L2     B5,B4,B4
           STW     .D2T1   A3,*B4            ; |209| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 210,column 4,is_stmt

           MVK     .S2     8192,B5           ; |210| 
||         ADD     .L2     4,B4,B4

           STW     .D2T2   B5,*B4            ; |210| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 213,column 4,is_stmt
           MVK     .S1     60,A4
           ADD     .L1X    B4,A4,A4
           STW     .D1T1   A3,*A4            ; |213| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 214,column 4,is_stmt
           ADD     .L1     -4,A4,A4
           STW     .D1T1   A3,*A4            ; |214| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 215,column 4,is_stmt
           ADD     .L1     -4,A4,A4
           STW     .D1T1   A3,*A4            ; |215| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 219,column 4,is_stmt
           ADD     .L1X    -4,B7,A17
           LDW     .D1T1   *A17,A3           ; |219| 
           ADD     .L1X    -4,B7,A5
           NOP             3
           SET     .S1     A3,9,9,A3         ; |219| 
           STW     .D1T1   A3,*A5            ; |219| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 220,column 11,is_stmt
           LDW     .D1T1   *A5,A3            ; |220| 
           NOP             4
           EXTU    .S1     A3,22,31,A0       ; |220| 
   [ A0]   BNOP    .S1     $C$L144,5         ; |220| 
           ; BRANCHCC OCCURS {$C$L144}       ; |220| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 219,column 4,is_stmt
           ZERO    .L1     A0
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 220
;*      Loop opening brace source line   : 220
;*      Loop closing brace source line   : 220
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 1
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       0     
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Did not find schedule
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Did not find schedule
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Did not find schedule
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L141:    ; PIPED LOOP PROLOG
   [!A0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L142:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_edma$4$B:
           NOP             3
   [!A0]   LDW     .D1T1   *A5,A4            ; |220| (P) <0,3>  ^ 
           NOP             2

           SPMASK          S1
||         MVK     .S1     0x200,A6          ; |219| 

           NOP             1
           AND     .L1     A6,A4,A3          ; |220| <0,8>  ^ 
           MV      .L1     A3,A0             ; |220| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_edma$4$E:
;** --------------------------------------------------------------------------*
$C$L143:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L144:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 221,column 4,is_stmt

           ADD     .L1     -4,A8,A9
||         ADD     .S1     -4,A8,A8

           LDW     .D1T1   *A8,A4            ; |221| 
           NOP             4
           OR      .L1     2,A4,A4           ; |221| 
           STW     .D1T1   A4,*A9            ; |221| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 222,column 11,is_stmt
           LDW     .D1T1   *A9,A4            ; |222| 
           NOP             4
           AND     .L1     2,A4,A0           ; |222| 

   [ A0]   BNOP    .S1     $C$L148,5         ; |222| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L148}       ; |222| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 222
;*      Loop opening brace source line   : 222
;*      Loop closing brace source line   : 222
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L145:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L146:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_edma$8$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A8,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |222| (P) <0,3>  ^ 
           NOP             4
           AND     .L1     2,A3,A0           ; |222| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |222| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_edma$8$E:
;** --------------------------------------------------------------------------*
$C$L147:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
           MV      .L1     A4,A8
;** --------------------------------------------------------------------------*
$C$L148:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 225,column 6,is_stmt
$C$DW$245	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$245, DW_AT_low_pc(0x00)
	.dwattr $C$DW$245, DW_AT_name("_EDMA3_PaRAM_setup")
	.dwattr $C$DW$245, DW_AT_TI_call
           CALLP   .S2     _EDMA3_PaRAM_setup,B3
$C$RL77:   ; CALL OCCURS {_EDMA3_PaRAM_setup} {0}  ; |225| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 227,column 4,is_stmt

           ZERO    .L2     B4
||         ADD     .L1     4,A16,A4

           SET     .S2     B4,0x0,0xf,B4
           STW     .D1T2   B4,*A4            ; |227| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 228,column 4,is_stmt
           ADD     .L2     4,B18,B5
           STW     .D2T2   B4,*B5            ; |228| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 232,column 12,is_stmt
           LDW     .D1T1   *A4,A3            ; |232| 
           MVK     .S1     0x20,A5           ; |232| 
           NOP             3
           EXTU    .S1     A3,26,31,A0       ; |232| 

   [!A0]   BNOP    .S1     $C$L152,5         ; |232| 
|| [ A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L152}       ; |232| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 232
;*      Loop closing brace source line   : 232
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L149:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L150:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_edma$14$B:
           NOP             2
           MV      .L1     A4,A6             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A6,A3            ; |232| (P) <0,3>  ^ 
           NOP             4
           AND     .L1     A5,A3,A0          ; |232| <0,8>  ^ 
   [!A0]   ZERO    .L2     B0                ; |232| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_edma$14$E:
;** --------------------------------------------------------------------------*
$C$L151:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L152:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 234,column 4,is_stmt
           LDW     .D1T1   *A17,A6           ; |234| 
           MV      .L1     A17,A5
           NOP             3
           SET     .S1     A6,10,10,A6       ; |234| 
           STW     .D1T1   A6,*A5            ; |234| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 235,column 11,is_stmt
           LDW     .D1T1   *A17,A5           ; |235| 
           NOP             4
           EXTU    .S1     A5,21,31,A0       ; |235| 
   [ A0]   BNOP    .S1     $C$L156,5         ; |235| 
           ; BRANCHCC OCCURS {$C$L156}       ; |235| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 234,column 4,is_stmt
           ZERO    .L1     A0
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 235
;*      Loop opening brace source line   : 235
;*      Loop closing brace source line   : 235
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 1
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       0     
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Did not find schedule
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Did not find schedule
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Did not find schedule
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L153:    ; PIPED LOOP PROLOG
   [!A0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L154:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_edma$19$B:
           NOP             2

           SPMASK          L1
||         MV      .L1     A17,A5            ; |234| 

   [!A0]   LDW     .D1T1   *A5,A4            ; |235| (P) <0,3>  ^ 
           NOP             2

           SPMASK          S1
||         MVK     .S1     0x400,A6          ; |234| 

           NOP             1
           AND     .L1     A6,A4,A3          ; |235| <0,8>  ^ 
           MV      .L1     A3,A0             ; |235| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_edma$19$E:
;** --------------------------------------------------------------------------*
$C$L155:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L156:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 236,column 4,is_stmt
           LDW     .D1T1   *A8,A5            ; |236| 
           NOP             4
           OR      .L1     4,A5,A5           ; |236| 
           STW     .D1T1   A5,*A8            ; |236| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 237,column 11,is_stmt
           LDW     .D1T1   *A8,A5            ; |237| 
           NOP             4
           AND     .L1     4,A5,A0           ; |237| 

   [ A0]   BNOP    .S1     $C$L160,5         ; |237| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L160}       ; |237| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 237
;*      Loop opening brace source line   : 237
;*      Loop closing brace source line   : 237
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L157:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L158:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_edma$23$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A9,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |237| (P) <0,3>  ^ 
           NOP             4
           AND     .L1     4,A3,A0           ; |237| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |237| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_edma$23$E:
;** --------------------------------------------------------------------------*
$C$L159:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
           MV      .L1     A4,A9
;** --------------------------------------------------------------------------*
$C$L160:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 240,column 4,is_stmt

           ADDAD   .D1     A7,16,A16
||         ZERO    .L2     B5                ; |240| 

           STW     .D1T2   B5,*A16           ; |240| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 241,column 4,is_stmt
           MVK     .S2     132,B4
           ADD     .L2X    A16,B4,B4
           STW     .D2T2   B5,*B4            ; |241| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 243,column 4,is_stmt
           MV      .L1     A17,A5
           LDW     .D1T1   *A5,A6            ; |243| 
           NOP             4
           SET     .S1     A6,11,11,A6       ; |243| 
           STW     .D1T1   A6,*A5            ; |243| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 244,column 11,is_stmt
           LDW     .D1T1   *A17,A5           ; |244| 
           NOP             4
           EXTU    .S1     A5,20,31,A0       ; |244| 
   [ A0]   BNOP    .S1     $C$L164,5         ; |244| 
           ; BRANCHCC OCCURS {$C$L164}       ; |244| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 243,column 4,is_stmt
           MV      .L1X    B5,A0             ; |243| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 244
;*      Loop opening brace source line   : 244
;*      Loop closing brace source line   : 244
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 1
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       0     
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Did not find schedule
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Did not find schedule
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Did not find schedule
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L161:    ; PIPED LOOP PROLOG
   [!A0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L162:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_edma$29$B:
           NOP             2

           SPMASK          L1
||         MV      .L1     A17,A5            ; |243| 

   [!A0]   LDW     .D1T1   *A5,A4            ; |244| (P) <0,3>  ^ 
           NOP             2

           SPMASK          S1
||         MVK     .S1     0x800,A6          ; |243| 

           NOP             1
           AND     .L1     A6,A4,A3          ; |244| <0,8>  ^ 
           MV      .L1     A3,A0             ; |244| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_edma$29$E:
;** --------------------------------------------------------------------------*
$C$L163:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L164:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 245,column 4,is_stmt
           LDW     .D1T1   *A8,A5            ; |245| 
           NOP             4
           OR      .L1     8,A5,A5           ; |245| 
           STW     .D1T1   A5,*A8            ; |245| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 246,column 11,is_stmt
           LDW     .D1T1   *A8,A5            ; |246| 
           NOP             4
           AND     .L1     8,A5,A0           ; |246| 

   [ A0]   BNOP    .S1     $C$L168,5         ; |246| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L168}       ; |246| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 246
;*      Loop opening brace source line   : 246
;*      Loop closing brace source line   : 246
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L165:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L166:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_edma$33$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A9,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |246| (P) <0,3>  ^ 
           NOP             4
           AND     .L1     8,A3,A0           ; |246| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |246| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_edma$33$E:
;** --------------------------------------------------------------------------*
$C$L167:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
           MV      .L1     A4,A9
;** --------------------------------------------------------------------------*
$C$L168:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 248,column 4,is_stmt
           MV      .L1     A17,A5
           LDW     .D1T1   *A5,A6            ; |248| 
           NOP             4
           SET     .S1     A6,12,12,A6       ; |248| 
           STW     .D1T1   A6,*A5            ; |248| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 249,column 11,is_stmt
           LDW     .D1T1   *A5,A6            ; |249| 
           NOP             4
           EXTU    .S1     A6,19,31,A0       ; |249| 
   [ A0]   BNOP    .S1     $C$L172,5         ; |249| 
           ; BRANCHCC OCCURS {$C$L172}       ; |249| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 248,column 4,is_stmt
           ZERO    .L1     A0
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 249
;*      Loop opening brace source line   : 249
;*      Loop closing brace source line   : 249
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 1
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     0        0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        0     
;*      Bound(.L .S .D .LS .LSD)     1*       0     
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Unsafe schedule for irregular loop
;*         ii = 4  Did not find schedule
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Unsafe schedule for irregular loop
;*         ii = 5  Did not find schedule
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Unsafe schedule for irregular loop
;*         ii = 6  Did not find schedule
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L169:    ; PIPED LOOP PROLOG
   [!A0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L170:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_edma$39$B:
           NOP             3
   [!A0]   LDW     .D1T1   *A5,A4            ; |249| (P) <0,3>  ^ 
           NOP             2

           SPMASK          S1
||         MVK     .S1     0x1000,A6         ; |248| 

           NOP             1
           AND     .L1     A6,A4,A3          ; |249| <0,8>  ^ 
           MV      .L1     A3,A0             ; |249| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_edma$39$E:
;** --------------------------------------------------------------------------*
$C$L171:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L172:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 250,column 4,is_stmt
           LDW     .D1T1   *A8,A4            ; |250| 
           NOP             4
           SET     .S1     A4,4,4,A4         ; |250| 
           STW     .D1T1   A4,*A8            ; |250| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 251,column 11,is_stmt
           LDW     .D1T1   *A8,A4            ; |251| 
           NOP             4
           EXTU    .S1     A4,27,31,A0       ; |251| 

   [ A0]   BNOP    .S1     $C$L176,5         ; |251| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L176}       ; |251| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 251
;*      Loop opening brace source line   : 251
;*      Loop closing brace source line   : 251
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     1*       0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          1        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             1*       0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L173:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L174:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_edma$43$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A9,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |251| (P) <0,3>  ^ 
           NOP             4
           EXTU    .S1     A3,27,31,A0       ; |251| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |251| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_edma$43$E:
;** --------------------------------------------------------------------------*
$C$L175:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L176:    
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 254,column 10,is_stmt
           LDW     .D1T1   *A7,A4            ; |254| 
           NOP             4
           EXTU    .S1     A4,27,31,A0       ; |254| 

   [ A0]   BNOP    .S1     $C$L180,5         ; |254| 
|| [!A0]   MVK     .L2     0x1,B0

           ; BRANCHCC OCCURS {$C$L180}       ; |254| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../L138_LCDK_aic3106_init.c
;*      Loop source line                 : 254
;*      Loop opening brace source line   : 254
;*      Loop closing brace source line   : 254
;*      Known Minimum Trip Count         : 1                    
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     1*       0     
;*      .D units                     1*       0     
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       0     
;*      Long read paths              0        0     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          1        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             1*       0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 7  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 1
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L177:    ; PIPED LOOP PROLOG
   [ B0]   SPLOOPW 7       ;14               ; (P) 
;** --------------------------------------------------------------------------*
$C$L178:    ; PIPED LOOP KERNEL
$C$DW$L$_L138_init_mcasp_edma$47$B:
           NOP             1

           SPMASK          L1
||         MV      .L1     A7,A4

           MV      .L1     A4,A5             ; (P) <0,2> 
   [ B0]   LDW     .D1T1   *A5,A3            ; |254| (P) <0,3>  ^ 
           NOP             4
           EXTU    .S1     A3,27,31,A0       ; |254| <0,8>  ^ 
   [ A0]   ZERO    .L2     B0                ; |254| <0,9>  ^ 
           NOP             2
           NOP             1
           SPKERNEL 0,0
$C$DW$L$_L138_init_mcasp_edma$47$E:
;** --------------------------------------------------------------------------*
$C$L179:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
$C$L180:    
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 255,column 4,is_stmt
           ZERO    .L1     A3                ; |255| 
           STW     .D1T1   A3,*A16           ; |255| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 256,column 1,is_stmt
           LDW     .D2T2   *++SP(8),B3       ; |256| 
           NOP             4
	.dwcfi	cfa_offset, 0
	.dwcfi	restore_reg, 19
	.dwcfi	cfa_offset, 0
$C$DW$246	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$246, DW_AT_low_pc(0x00)
	.dwattr $C$DW$246, DW_AT_TI_return
           RETNOP  .S2     B3,5              ; |256| 
           ; BRANCH OCCURS {B3}              ; |256| 

$C$DW$247	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$247, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L178:1:1589536273")
	.dwattr $C$DW$247, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$247, DW_AT_TI_begin_line(0xfe)
	.dwattr $C$DW$247, DW_AT_TI_end_line(0xfe)
$C$DW$248	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$248, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_edma$47$B)
	.dwattr $C$DW$248, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_edma$47$E)
	.dwendtag $C$DW$247


$C$DW$249	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$249, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L174:1:1589536273")
	.dwattr $C$DW$249, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$249, DW_AT_TI_begin_line(0xfb)
	.dwattr $C$DW$249, DW_AT_TI_end_line(0xfb)
$C$DW$250	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$250, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_edma$43$B)
	.dwattr $C$DW$250, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_edma$43$E)
	.dwendtag $C$DW$249


$C$DW$251	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$251, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L170:1:1589536273")
	.dwattr $C$DW$251, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$251, DW_AT_TI_begin_line(0xf9)
	.dwattr $C$DW$251, DW_AT_TI_end_line(0xf9)
$C$DW$252	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$252, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_edma$39$B)
	.dwattr $C$DW$252, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_edma$39$E)
	.dwendtag $C$DW$251


$C$DW$253	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$253, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L166:1:1589536273")
	.dwattr $C$DW$253, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$253, DW_AT_TI_begin_line(0xf6)
	.dwattr $C$DW$253, DW_AT_TI_end_line(0xf6)
$C$DW$254	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$254, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_edma$33$B)
	.dwattr $C$DW$254, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_edma$33$E)
	.dwendtag $C$DW$253


$C$DW$255	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$255, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L162:1:1589536273")
	.dwattr $C$DW$255, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$255, DW_AT_TI_begin_line(0xf4)
	.dwattr $C$DW$255, DW_AT_TI_end_line(0xf4)
$C$DW$256	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$256, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_edma$29$B)
	.dwattr $C$DW$256, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_edma$29$E)
	.dwendtag $C$DW$255


$C$DW$257	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$257, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L158:1:1589536273")
	.dwattr $C$DW$257, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$257, DW_AT_TI_begin_line(0xed)
	.dwattr $C$DW$257, DW_AT_TI_end_line(0xed)
$C$DW$258	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$258, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_edma$23$B)
	.dwattr $C$DW$258, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_edma$23$E)
	.dwendtag $C$DW$257


$C$DW$259	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$259, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L154:1:1589536273")
	.dwattr $C$DW$259, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$259, DW_AT_TI_begin_line(0xeb)
	.dwattr $C$DW$259, DW_AT_TI_end_line(0xeb)
$C$DW$260	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$260, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_edma$19$B)
	.dwattr $C$DW$260, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_edma$19$E)
	.dwendtag $C$DW$259


$C$DW$261	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$261, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L150:1:1589536273")
	.dwattr $C$DW$261, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$261, DW_AT_TI_begin_line(0xe8)
	.dwattr $C$DW$261, DW_AT_TI_end_line(0xe8)
$C$DW$262	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$262, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_edma$14$B)
	.dwattr $C$DW$262, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_edma$14$E)
	.dwendtag $C$DW$261


$C$DW$263	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$263, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L146:1:1589536273")
	.dwattr $C$DW$263, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$263, DW_AT_TI_begin_line(0xde)
	.dwattr $C$DW$263, DW_AT_TI_end_line(0xde)
$C$DW$264	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$264, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_edma$8$B)
	.dwattr $C$DW$264, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_edma$8$E)
	.dwendtag $C$DW$263


$C$DW$265	.dwtag  DW_TAG_TI_loop
	.dwattr $C$DW$265, DW_AT_name("C:\sc\OneDrive\didatt_od\___corso_SIM_od\DSP\lab\c6748\projects_basic\fir_filter_NEW\Debug\L138_LCDK_aic3106_init.asm:$C$L142:1:1589536273")
	.dwattr $C$DW$265, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$265, DW_AT_TI_begin_line(0xdc)
	.dwattr $C$DW$265, DW_AT_TI_end_line(0xdc)
$C$DW$266	.dwtag  DW_TAG_TI_loop_range
	.dwattr $C$DW$266, DW_AT_low_pc($C$DW$L$_L138_init_mcasp_edma$4$B)
	.dwattr $C$DW$266, DW_AT_high_pc($C$DW$L$_L138_init_mcasp_edma$4$E)
	.dwendtag $C$DW$265

	.dwattr $C$DW$244, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$244, DW_AT_TI_end_line(0x100)
	.dwattr $C$DW$244, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$244

	.sect	".text"
	.clink
	.global	_L138_initialise_edma

$C$DW$267	.dwtag  DW_TAG_subprogram, DW_AT_name("L138_initialise_edma")
	.dwattr $C$DW$267, DW_AT_low_pc(_L138_initialise_edma)
	.dwattr $C$DW$267, DW_AT_high_pc(0x00)
	.dwattr $C$DW$267, DW_AT_TI_symbol_name("_L138_initialise_edma")
	.dwattr $C$DW$267, DW_AT_external
	.dwattr $C$DW$267, DW_AT_TI_begin_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$267, DW_AT_TI_begin_line(0x21d)
	.dwattr $C$DW$267, DW_AT_TI_begin_column(0x06)
	.dwattr $C$DW$267, DW_AT_TI_max_frame_size(0x20)
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 542,column 1,is_stmt,address _L138_initialise_edma

	.dwfde $C$DW$CIE, _L138_initialise_edma
$C$DW$268	.dwtag  DW_TAG_formal_parameter, DW_AT_name("fs")
	.dwattr $C$DW$268, DW_AT_TI_symbol_name("_fs")
	.dwattr $C$DW$268, DW_AT_type(*$C$DW$T$60)
	.dwattr $C$DW$268, DW_AT_location[DW_OP_reg4]
$C$DW$269	.dwtag  DW_TAG_formal_parameter, DW_AT_name("adc_gain")
	.dwattr $C$DW$269, DW_AT_TI_symbol_name("_adc_gain")
	.dwattr $C$DW$269, DW_AT_type(*$C$DW$T$62)
	.dwattr $C$DW$269, DW_AT_location[DW_OP_reg20]
$C$DW$270	.dwtag  DW_TAG_formal_parameter, DW_AT_name("dac_atten")
	.dwattr $C$DW$270, DW_AT_TI_symbol_name("_dac_atten")
	.dwattr $C$DW$270, DW_AT_type(*$C$DW$T$62)
	.dwattr $C$DW$270, DW_AT_location[DW_OP_reg6]
$C$DW$271	.dwtag  DW_TAG_formal_parameter, DW_AT_name("input_type")
	.dwattr $C$DW$271, DW_AT_TI_symbol_name("_input_type")
	.dwattr $C$DW$271, DW_AT_type(*$C$DW$T$66)
	.dwattr $C$DW$271, DW_AT_location[DW_OP_reg22]

;******************************************************************************
;* FUNCTION NAME: L138_initialise_edma                                        *
;*                                                                            *
;*   Regs Modified     : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,B0,B1, *
;*                           B2,B3,B4,B5,B6,B7,B8,B9,SP,A16,A17,A18,A19,A20,  *
;*                           A21,A22,A23,A24,A25,A26,A27,A28,A29,A30,A31,B16, *
;*                           B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28, *
;*                           B29,B30,B31                                      *
;*   Regs Used         : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,B0,B1, *
;*                           B2,B3,B4,B5,B6,B7,B8,B9,DP,SP,A16,A17,A18,A19,   *
;*                           A20,A21,A22,A23,A24,A25,A26,A27,A28,A29,A30,A31, *
;*                           B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27, *
;*                           B28,B29,B30,B31                                  *
;*   Local Frame Size  : 0 Args + 0 Auto + 32 Save = 32 byte                  *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_L138_initialise_edma:
;** --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
	.dwcfi	save_reg_to_reg, 228, 19
           STW     .D2T2   B3,*SP--(8)       ; |542| 
	.dwcfi	cfa_offset, 8
	.dwcfi	save_reg_to_mem, 19, 0
           STDW    .D2T1   A13:A12,*SP--     ; |542| 
	.dwcfi	cfa_offset, 16
	.dwcfi	save_reg_to_mem, 13, -4
	.dwcfi	save_reg_to_mem, 12, -8
           STDW    .D2T1   A11:A10,*SP--     ; |542| 
	.dwcfi	cfa_offset, 24
	.dwcfi	save_reg_to_mem, 11, -12
	.dwcfi	save_reg_to_mem, 10, -16
$C$DW$272	.dwtag  DW_TAG_variable, DW_AT_name("input_type")
	.dwattr $C$DW$272, DW_AT_TI_symbol_name("_input_type")
	.dwattr $C$DW$272, DW_AT_type(*$C$DW$T$70)
	.dwattr $C$DW$272, DW_AT_location[DW_OP_reg13]
$C$DW$273	.dwtag  DW_TAG_variable, DW_AT_name("dac_atten")
	.dwattr $C$DW$273, DW_AT_TI_symbol_name("_dac_atten")
	.dwattr $C$DW$273, DW_AT_type(*$C$DW$T$82)
	.dwattr $C$DW$273, DW_AT_location[DW_OP_reg12]
$C$DW$274	.dwtag  DW_TAG_variable, DW_AT_name("adc_gain")
	.dwattr $C$DW$274, DW_AT_TI_symbol_name("_adc_gain")
	.dwattr $C$DW$274, DW_AT_type(*$C$DW$T$82)
	.dwattr $C$DW$274, DW_AT_location[DW_OP_reg11]
$C$DW$275	.dwtag  DW_TAG_variable, DW_AT_name("fs")
	.dwattr $C$DW$275, DW_AT_TI_symbol_name("_fs")
	.dwattr $C$DW$275, DW_AT_type(*$C$DW$T$86)
	.dwattr $C$DW$275, DW_AT_location[DW_OP_reg10]
           MV      .L1X    B4,A11            ; |542| 

           MV      .L1     A6,A12            ; |542| 
||         MV      .S1X    B6,A13            ; |542| 
||         MV      .D1     A4,A10            ; |542| 

	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 544,column 3,is_stmt
           ZERO    .L2     B4                ; |544| 
           STW     .D2T2   B4,*+DP(_poll)    ; |544| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 548,column 3,is_stmt
$C$DW$276	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$276, DW_AT_low_pc(0x00)
	.dwattr $C$DW$276, DW_AT_name("_malloc")
	.dwattr $C$DW$276, DW_AT_TI_call

           CALLP   .S2     _malloc,B3
||         MVK     .S1     0x100,A4          ; |548| 

$C$RL78:   ; CALL OCCURS {_malloc} {0}       ; |548| 
;** --------------------------------------------------------------------------*
           STW     .D2T1   A4,*+DP(_pingOUT) ; |548| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 549,column 3,is_stmt
$C$DW$277	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$277, DW_AT_low_pc(0x00)
	.dwattr $C$DW$277, DW_AT_name("_malloc")
	.dwattr $C$DW$277, DW_AT_TI_call

           CALLP   .S2     _malloc,B3
||         MVK     .S1     0x100,A4          ; |549| 

$C$RL79:   ; CALL OCCURS {_malloc} {0}       ; |549| 
           MV      .L2X    A4,B4             ; |549| 
           STW     .D2T2   B4,*+DP(_pongOUT) ; |549| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 550,column 3,is_stmt
$C$DW$278	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$278, DW_AT_low_pc(0x00)
	.dwattr $C$DW$278, DW_AT_name("_malloc")
	.dwattr $C$DW$278, DW_AT_TI_call

           CALLP   .S2     _malloc,B3
||         MVK     .S1     0x100,A4          ; |550| 

$C$RL80:   ; CALL OCCURS {_malloc} {0}       ; |550| 
           STW     .D2T1   A4,*+DP(_pingIN)  ; |550| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 551,column 3,is_stmt
$C$DW$279	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$279, DW_AT_low_pc(0x00)
	.dwattr $C$DW$279, DW_AT_name("_malloc")
	.dwattr $C$DW$279, DW_AT_TI_call

           CALLP   .S2     _malloc,B3
||         MVK     .S1     0x100,A4          ; |551| 

$C$RL81:   ; CALL OCCURS {_malloc} {0}       ; |551| 
           STW     .D2T1   A4,*+DP(_pongIN)  ; |551| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 553,column 3,is_stmt
$C$DW$280	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$280, DW_AT_low_pc(0x00)
	.dwattr $C$DW$280, DW_AT_name("_USTIMER_init")
	.dwattr $C$DW$280, DW_AT_TI_call
           CALLP   .S2     _USTIMER_init,B3
$C$RL82:   ; CALL OCCURS {_USTIMER_init} {0}  ; |553| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 555,column 3,is_stmt
           MVKL    .S1     0x1e27000,A4
$C$DW$281	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$281, DW_AT_low_pc(0x00)
	.dwattr $C$DW$281, DW_AT_name("_EVMOMAPL138_lpscTransition")
	.dwattr $C$DW$281, DW_AT_TI_call

           CALLP   .S2     _EVMOMAPL138_lpscTransition,B3
||         MVKH    .S1     0x1e27000,A4
||         MVK     .L1     0x7,A6            ; |555| 
||         MVK     .L2     0x3,B6            ; |555| 
||         MVK     .D2     0x1,B4            ; |555| 

$C$RL83:   ; CALL OCCURS {_EVMOMAPL138_lpscTransition} {0}  ; |555| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 556,column 3,is_stmt
           ZERO    .L2     B4

           MVKL    .S1     0x1111111,A6
||         SET     .S2     B4,0x0,0x1b,B4

$C$DW$282	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$282, DW_AT_low_pc(0x00)
	.dwattr $C$DW$282, DW_AT_name("_EVMOMAPL138_pinmuxConfig")
	.dwattr $C$DW$282, DW_AT_TI_call

           CALLP   .S2     _EVMOMAPL138_pinmuxConfig,B3
||         MVKH    .S1     0x1111111,A6
||         ZERO    .L1     A4                ; |556| 

$C$RL84:   ; CALL OCCURS {_EVMOMAPL138_pinmuxConfig} {0}  ; |556| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 557,column 3,is_stmt
           ZERO    .L2     B4

           MVKL    .S1     0x8888110,A6
||         SET     .S2     B4,0x4,0x1b,B4

$C$DW$283	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$283, DW_AT_low_pc(0x00)
	.dwattr $C$DW$283, DW_AT_name("_EVMOMAPL138_pinmuxConfig")
	.dwattr $C$DW$283, DW_AT_TI_call

           CALLP   .S2     _EVMOMAPL138_pinmuxConfig,B3
||         MVKH    .S1     0x8888110,A6
||         MVK     .L1     0x1,A4            ; |557| 

$C$RL85:   ; CALL OCCURS {_EVMOMAPL138_pinmuxConfig} {0}  ; |557| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 560,column 3,is_stmt
           MVKL    .S1     0x1c22024,A3

           MVKH    .S1     0x1c22024,A3
||         ZERO    .L1     A4                ; |560| 

           STW     .D1T1   A4,*A3            ; |560| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 561,column 3,is_stmt
           MVK     .S2     12,B4

           ADD     .L2X    A3,B4,B4
||         MVK     .L1     2,A4              ; |561| 

           STW     .D2T1   A4,*B4            ; |561| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 562,column 3,is_stmt

           SUBAW   .D2     B4,9,B5
||         MVK     .L2     0x5,B4            ; |562| 

           STW     .D2T2   B4,*B5            ; |562| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 563,column 3,is_stmt
           ADD     .L2     4,B5,B5
           STW     .D2T2   B4,*B5            ; |563| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 564,column 3,is_stmt
           LDW     .D1T1   *A3,A4            ; |564| 
           NOP             4
           SET     .S1     A4,5,5,A4         ; |564| 
           STW     .D1T1   A4,*A3            ; |564| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 566,column 3,is_stmt
           ZERO    .L2     B4                ; |566| 
           MVC     .S2     B4,CSR            ; |566| 
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 569,column 3,is_stmt
           MV      .L2X    A11,B4            ; |569| 
$C$DW$284	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$284, DW_AT_low_pc(0x00)
	.dwattr $C$DW$284, DW_AT_name("_L138_init_aic3106_registers")
	.dwattr $C$DW$284, DW_AT_TI_call

           CALLP   .S2     _L138_init_aic3106_registers,B3
||         MV      .L2X    A13,B6            ; |569| 
||         MV      .L1     A12,A6            ; |569| 
||         MV      .S1     A10,A4            ; |569| 

$C$RL86:   ; CALL OCCURS {_L138_init_aic3106_registers} {0}  ; |569| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 571,column 3,is_stmt
$C$DW$285	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$285, DW_AT_low_pc(0x00)
	.dwattr $C$DW$285, DW_AT_name("_L138_init_mcasp_edma")
	.dwattr $C$DW$285, DW_AT_TI_call
           CALLP   .S2     _L138_init_mcasp_edma,B3
$C$RL87:   ; CALL OCCURS {_L138_init_mcasp_edma} {0}  ; |571| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 574,column 3,is_stmt
           MVKL    .S2     0x1c01070,B5

           MVKH    .S2     0x1c01070,B5
||         MVK     .L2     7,B4              ; |574| 

           STW     .D2T2   B4,*B5            ; |574| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 578,column 3,is_stmt
           MVKL    .S1     0x1800104,A4

           MVKH    .S1     0x1800104,A4
||         MVK     .L1     8,A3              ; |578| 

           STW     .D1T1   A3,*A4            ; |578| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 580,column 3,is_stmt
           MVKL    .S2     _vectors,B4
           MVKH    .S2     _vectors,B4
           MVC     .S2     B4,ISTP           ; |580| 
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 582,column 3,is_stmt

           SUBAW   .D2     B5,4,B4
||         MVK     .L1     0x3,A3            ; |582| 

           STW     .D2T1   A3,*B4            ; |582| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 583,column 3,is_stmt
           MVKL    .S1     0x1c00348,A4
           MVKH    .S1     0x1c00348,A4
           STW     .D1T1   A3,*A4            ; |583| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 587,column 3,is_stmt
           ZERO    .L2     B4
           SET     .S2     B4,0x4,0xf,B4
           MVC     .S2     B4,ICR            ; |587| 
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 588,column 3,is_stmt
           MVC     .S2     IER,B4            ; |588| 
           MVK     .S1     18,A3             ; |588| 
           NOP             1
           OR      .L2X    A3,B4,B4          ; |588| 
           MVC     .S2     B4,IER            ; |588| 
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 590,column 3,is_stmt
           MVC     .S2     CSR,B4            ; |590| 
           OR      .L2     1,B4,B4           ; |590| 
           MVC     .S2     B4,CSR            ; |590| 
           NOP             1
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 521,column 3,is_stmt
           MVK     .L1     0x1,A6            ; |521| 
           ZERO    .L1     A4                ; |521| 
$C$DW$286	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$286, DW_AT_low_pc(0x00)
	.dwattr $C$DW$286, DW_AT_name("_GPIO_setDir")
	.dwattr $C$DW$286, DW_AT_TI_call

           CALLP   .S2     _GPIO_setDir,B3
||         MV      .L2X    A6,B4             ; |521| 

$C$RL88:   ; CALL OCCURS {_GPIO_setDir} {0}  ; |521| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 522,column 3,is_stmt
$C$DW$287	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$287, DW_AT_low_pc(0x00)
	.dwattr $C$DW$287, DW_AT_name("_GPIO_setDir")
	.dwattr $C$DW$287, DW_AT_TI_call

           CALLP   .S2     _GPIO_setDir,B3
||         ZERO    .L1     A4                ; |522| 
||         MVK     .L2     0x2,B4            ; |522| 
||         MVK     .S1     0x1,A6            ; |522| 

$C$RL89:   ; CALL OCCURS {_GPIO_setDir} {0}  ; |522| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 523,column 3,is_stmt
$C$DW$288	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$288, DW_AT_low_pc(0x00)
	.dwattr $C$DW$288, DW_AT_name("_GPIO_setDir")
	.dwattr $C$DW$288, DW_AT_TI_call

           CALLP   .S2     _GPIO_setDir,B3
||         ZERO    .L1     A4                ; |523| 
||         MVK     .L2     0x3,B4            ; |523| 
||         MVK     .S1     0x1,A6            ; |523| 

$C$RL90:   ; CALL OCCURS {_GPIO_setDir} {0}  ; |523| 
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 524,column 3,is_stmt
$C$DW$289	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$289, DW_AT_low_pc(0x00)
	.dwattr $C$DW$289, DW_AT_name("_GPIO_setDir")
	.dwattr $C$DW$289, DW_AT_TI_call

           CALLP   .S2     _GPIO_setDir,B3
||         ZERO    .L1     A4                ; |524| 
||         MVK     .L2     0x4,B4            ; |524| 
||         MVK     .S1     0x1,A6            ; |524| 

$C$RL91:   ; CALL OCCURS {_GPIO_setDir} {0}  ; |524| 
;** --------------------------------------------------------------------------*
	.dwpsn	file "../L138_LCDK_aic3106_init.c",line 593,column 1,is_stmt
           LDDW    .D2T1   *++SP,A11:A10
	.dwcfi	cfa_offset, 16
	.dwcfi	restore_reg, 11
	.dwcfi	restore_reg, 10
           LDDW    .D2T1   *++SP,A13:A12
	.dwcfi	cfa_offset, 8
	.dwcfi	restore_reg, 13
	.dwcfi	restore_reg, 12
           LDW     .D2T2   *++SP(8),B3       ; |593| 
           NOP             4
	.dwcfi	cfa_offset, 0
	.dwcfi	restore_reg, 19
	.dwcfi	cfa_offset, 0
$C$DW$290	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$290, DW_AT_low_pc(0x00)
	.dwattr $C$DW$290, DW_AT_TI_return
           RETNOP  .S2     B3,5
           ; BRANCH OCCURS {B3}  
	.dwattr $C$DW$267, DW_AT_TI_end_file("../L138_LCDK_aic3106_init.c")
	.dwattr $C$DW$267, DW_AT_TI_end_line(0x251)
	.dwattr $C$DW$267, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$267

;*****************************************************************************
;* UNDEFINED EXTERNAL REFERENCES                                             *
;*****************************************************************************
	.global	_malloc
	.global	_EVMOMAPL138_pinmuxConfig
	.global	_EVMOMAPL138_lpscTransition
	.global	_USTIMER_init
	.global	_GPIO_setDir
	.global	_GPIO_getInput
	.global	_AIC3106_writeRegister
	.global	_vectors

;******************************************************************************
;* BUILD ATTRIBUTES                                                           *
;******************************************************************************
	.battr "TI", Tag_File, 1, Tag_ABI_stack_align_needed(0)
	.battr "TI", Tag_File, 1, Tag_ABI_stack_align_preserved(0)
	.battr "TI", Tag_File, 1, Tag_Tramps_Use_SOC(1)

;******************************************************************************
;* TYPE INFORMATION                                                           *
;******************************************************************************

$C$DW$T$30	.dwtag  DW_TAG_structure_type
	.dwattr $C$DW$T$30, DW_AT_byte_size(0xa80)
$C$DW$291	.dwtag  DW_TAG_member
	.dwattr $C$DW$291, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$291, DW_AT_name("REVID")
	.dwattr $C$DW$291, DW_AT_TI_symbol_name("_REVID")
	.dwattr $C$DW$291, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$291, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$292	.dwtag  DW_TAG_member
	.dwattr $C$DW$292, DW_AT_type(*$C$DW$T$21)
	.dwattr $C$DW$292, DW_AT_name("RSVD0")
	.dwattr $C$DW$292, DW_AT_TI_symbol_name("_RSVD0")
	.dwattr $C$DW$292, DW_AT_data_member_location[DW_OP_plus_uconst 0x4]
	.dwattr $C$DW$292, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$293	.dwtag  DW_TAG_member
	.dwattr $C$DW$293, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$293, DW_AT_name("INTEVAL")
	.dwattr $C$DW$293, DW_AT_TI_symbol_name("_INTEVAL")
	.dwattr $C$DW$293, DW_AT_data_member_location[DW_OP_plus_uconst 0x18]
	.dwattr $C$DW$293, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$294	.dwtag  DW_TAG_member
	.dwattr $C$DW$294, DW_AT_type(*$C$DW$T$22)
	.dwattr $C$DW$294, DW_AT_name("RSVD1")
	.dwattr $C$DW$294, DW_AT_TI_symbol_name("_RSVD1")
	.dwattr $C$DW$294, DW_AT_data_member_location[DW_OP_plus_uconst 0x1c]
	.dwattr $C$DW$294, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$295	.dwtag  DW_TAG_member
	.dwattr $C$DW$295, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$295, DW_AT_name("MERRPR0")
	.dwattr $C$DW$295, DW_AT_TI_symbol_name("_MERRPR0")
	.dwattr $C$DW$295, DW_AT_data_member_location[DW_OP_plus_uconst 0x40]
	.dwattr $C$DW$295, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$296	.dwtag  DW_TAG_member
	.dwattr $C$DW$296, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$296, DW_AT_name("RSVD2")
	.dwattr $C$DW$296, DW_AT_TI_symbol_name("_RSVD2")
	.dwattr $C$DW$296, DW_AT_data_member_location[DW_OP_plus_uconst 0x44]
	.dwattr $C$DW$296, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$297	.dwtag  DW_TAG_member
	.dwattr $C$DW$297, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$297, DW_AT_name("MERRCR0")
	.dwattr $C$DW$297, DW_AT_TI_symbol_name("_MERRCR0")
	.dwattr $C$DW$297, DW_AT_data_member_location[DW_OP_plus_uconst 0x50]
	.dwattr $C$DW$297, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$298	.dwtag  DW_TAG_member
	.dwattr $C$DW$298, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$298, DW_AT_name("RSVD3")
	.dwattr $C$DW$298, DW_AT_TI_symbol_name("_RSVD3")
	.dwattr $C$DW$298, DW_AT_data_member_location[DW_OP_plus_uconst 0x54]
	.dwattr $C$DW$298, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$299	.dwtag  DW_TAG_member
	.dwattr $C$DW$299, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$299, DW_AT_name("PERRPR")
	.dwattr $C$DW$299, DW_AT_TI_symbol_name("_PERRPR")
	.dwattr $C$DW$299, DW_AT_data_member_location[DW_OP_plus_uconst 0x60]
	.dwattr $C$DW$299, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$300	.dwtag  DW_TAG_member
	.dwattr $C$DW$300, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$300, DW_AT_name("RSVD4")
	.dwattr $C$DW$300, DW_AT_TI_symbol_name("_RSVD4")
	.dwattr $C$DW$300, DW_AT_data_member_location[DW_OP_plus_uconst 0x64]
	.dwattr $C$DW$300, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$301	.dwtag  DW_TAG_member
	.dwattr $C$DW$301, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$301, DW_AT_name("PERRCR")
	.dwattr $C$DW$301, DW_AT_TI_symbol_name("_PERRCR")
	.dwattr $C$DW$301, DW_AT_data_member_location[DW_OP_plus_uconst 0x68]
	.dwattr $C$DW$301, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$302	.dwtag  DW_TAG_member
	.dwattr $C$DW$302, DW_AT_type(*$C$DW$T$24)
	.dwattr $C$DW$302, DW_AT_name("RSVD5")
	.dwattr $C$DW$302, DW_AT_TI_symbol_name("_RSVD5")
	.dwattr $C$DW$302, DW_AT_data_member_location[DW_OP_plus_uconst 0x6c]
	.dwattr $C$DW$302, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$303	.dwtag  DW_TAG_member
	.dwattr $C$DW$303, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$303, DW_AT_name("PTCMD")
	.dwattr $C$DW$303, DW_AT_TI_symbol_name("_PTCMD")
	.dwattr $C$DW$303, DW_AT_data_member_location[DW_OP_plus_uconst 0x120]
	.dwattr $C$DW$303, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$304	.dwtag  DW_TAG_member
	.dwattr $C$DW$304, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$304, DW_AT_name("RSVD6")
	.dwattr $C$DW$304, DW_AT_TI_symbol_name("_RSVD6")
	.dwattr $C$DW$304, DW_AT_data_member_location[DW_OP_plus_uconst 0x124]
	.dwattr $C$DW$304, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$305	.dwtag  DW_TAG_member
	.dwattr $C$DW$305, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$305, DW_AT_name("PTSTAT")
	.dwattr $C$DW$305, DW_AT_TI_symbol_name("_PTSTAT")
	.dwattr $C$DW$305, DW_AT_data_member_location[DW_OP_plus_uconst 0x128]
	.dwattr $C$DW$305, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$306	.dwtag  DW_TAG_member
	.dwattr $C$DW$306, DW_AT_type(*$C$DW$T$25)
	.dwattr $C$DW$306, DW_AT_name("RSVD7")
	.dwattr $C$DW$306, DW_AT_TI_symbol_name("_RSVD7")
	.dwattr $C$DW$306, DW_AT_data_member_location[DW_OP_plus_uconst 0x12c]
	.dwattr $C$DW$306, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$307	.dwtag  DW_TAG_member
	.dwattr $C$DW$307, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$307, DW_AT_name("PDSTAT0")
	.dwattr $C$DW$307, DW_AT_TI_symbol_name("_PDSTAT0")
	.dwattr $C$DW$307, DW_AT_data_member_location[DW_OP_plus_uconst 0x200]
	.dwattr $C$DW$307, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$308	.dwtag  DW_TAG_member
	.dwattr $C$DW$308, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$308, DW_AT_name("PDSTAT1")
	.dwattr $C$DW$308, DW_AT_TI_symbol_name("_PDSTAT1")
	.dwattr $C$DW$308, DW_AT_data_member_location[DW_OP_plus_uconst 0x204]
	.dwattr $C$DW$308, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$309	.dwtag  DW_TAG_member
	.dwattr $C$DW$309, DW_AT_type(*$C$DW$T$26)
	.dwattr $C$DW$309, DW_AT_name("RSVD8")
	.dwattr $C$DW$309, DW_AT_TI_symbol_name("_RSVD8")
	.dwattr $C$DW$309, DW_AT_data_member_location[DW_OP_plus_uconst 0x208]
	.dwattr $C$DW$309, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$310	.dwtag  DW_TAG_member
	.dwattr $C$DW$310, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$310, DW_AT_name("PDCTL0")
	.dwattr $C$DW$310, DW_AT_TI_symbol_name("_PDCTL0")
	.dwattr $C$DW$310, DW_AT_data_member_location[DW_OP_plus_uconst 0x300]
	.dwattr $C$DW$310, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$311	.dwtag  DW_TAG_member
	.dwattr $C$DW$311, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$311, DW_AT_name("PDCTL1")
	.dwattr $C$DW$311, DW_AT_TI_symbol_name("_PDCTL1")
	.dwattr $C$DW$311, DW_AT_data_member_location[DW_OP_plus_uconst 0x304]
	.dwattr $C$DW$311, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$312	.dwtag  DW_TAG_member
	.dwattr $C$DW$312, DW_AT_type(*$C$DW$T$26)
	.dwattr $C$DW$312, DW_AT_name("RSVD9")
	.dwattr $C$DW$312, DW_AT_TI_symbol_name("_RSVD9")
	.dwattr $C$DW$312, DW_AT_data_member_location[DW_OP_plus_uconst 0x308]
	.dwattr $C$DW$312, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$313	.dwtag  DW_TAG_member
	.dwattr $C$DW$313, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$313, DW_AT_name("PDCFG0")
	.dwattr $C$DW$313, DW_AT_TI_symbol_name("_PDCFG0")
	.dwattr $C$DW$313, DW_AT_data_member_location[DW_OP_plus_uconst 0x400]
	.dwattr $C$DW$313, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$314	.dwtag  DW_TAG_member
	.dwattr $C$DW$314, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$314, DW_AT_name("PDCFG1")
	.dwattr $C$DW$314, DW_AT_TI_symbol_name("_PDCFG1")
	.dwattr $C$DW$314, DW_AT_data_member_location[DW_OP_plus_uconst 0x404]
	.dwattr $C$DW$314, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$315	.dwtag  DW_TAG_member
	.dwattr $C$DW$315, DW_AT_type(*$C$DW$T$27)
	.dwattr $C$DW$315, DW_AT_name("RSVD10")
	.dwattr $C$DW$315, DW_AT_TI_symbol_name("_RSVD10")
	.dwattr $C$DW$315, DW_AT_data_member_location[DW_OP_plus_uconst 0x408]
	.dwattr $C$DW$315, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$316	.dwtag  DW_TAG_member
	.dwattr $C$DW$316, DW_AT_type(*$C$DW$T$28)
	.dwattr $C$DW$316, DW_AT_name("MDSTAT")
	.dwattr $C$DW$316, DW_AT_TI_symbol_name("_MDSTAT")
	.dwattr $C$DW$316, DW_AT_data_member_location[DW_OP_plus_uconst 0x800]
	.dwattr $C$DW$316, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$317	.dwtag  DW_TAG_member
	.dwattr $C$DW$317, DW_AT_type(*$C$DW$T$29)
	.dwattr $C$DW$317, DW_AT_name("RSVD11")
	.dwattr $C$DW$317, DW_AT_TI_symbol_name("_RSVD11")
	.dwattr $C$DW$317, DW_AT_data_member_location[DW_OP_plus_uconst 0x880]
	.dwattr $C$DW$317, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$318	.dwtag  DW_TAG_member
	.dwattr $C$DW$318, DW_AT_type(*$C$DW$T$28)
	.dwattr $C$DW$318, DW_AT_name("MDCTL")
	.dwattr $C$DW$318, DW_AT_TI_symbol_name("_MDCTL")
	.dwattr $C$DW$318, DW_AT_data_member_location[DW_OP_plus_uconst 0xa00]
	.dwattr $C$DW$318, DW_AT_accessibility(DW_ACCESS_public)
	.dwendtag $C$DW$T$30

$C$DW$T$42	.dwtag  DW_TAG_typedef, DW_AT_name("psc_regs_t")
	.dwattr $C$DW$T$42, DW_AT_type(*$C$DW$T$30)
	.dwattr $C$DW$T$42, DW_AT_language(DW_LANG_C)
$C$DW$T$43	.dwtag  DW_TAG_pointer_type
	.dwattr $C$DW$T$43, DW_AT_type(*$C$DW$T$42)
	.dwattr $C$DW$T$43, DW_AT_address_class(0x20)

$C$DW$T$35	.dwtag  DW_TAG_structure_type
	.dwattr $C$DW$T$35, DW_AT_byte_size(0x2c0)
$C$DW$319	.dwtag  DW_TAG_member
	.dwattr $C$DW$319, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$319, DW_AT_name("REVID")
	.dwattr $C$DW$319, DW_AT_TI_symbol_name("_REVID")
	.dwattr $C$DW$319, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$319, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$320	.dwtag  DW_TAG_member
	.dwattr $C$DW$320, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$320, DW_AT_name("RSVD0")
	.dwattr $C$DW$320, DW_AT_TI_symbol_name("_RSVD0")
	.dwattr $C$DW$320, DW_AT_data_member_location[DW_OP_plus_uconst 0x4]
	.dwattr $C$DW$320, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$321	.dwtag  DW_TAG_member
	.dwattr $C$DW$321, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$321, DW_AT_name("PFUNC")
	.dwattr $C$DW$321, DW_AT_TI_symbol_name("_PFUNC")
	.dwattr $C$DW$321, DW_AT_data_member_location[DW_OP_plus_uconst 0x10]
	.dwattr $C$DW$321, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$322	.dwtag  DW_TAG_member
	.dwattr $C$DW$322, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$322, DW_AT_name("PDIR")
	.dwattr $C$DW$322, DW_AT_TI_symbol_name("_PDIR")
	.dwattr $C$DW$322, DW_AT_data_member_location[DW_OP_plus_uconst 0x14]
	.dwattr $C$DW$322, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$323	.dwtag  DW_TAG_member
	.dwattr $C$DW$323, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$323, DW_AT_name("PDOUT")
	.dwattr $C$DW$323, DW_AT_TI_symbol_name("_PDOUT")
	.dwattr $C$DW$323, DW_AT_data_member_location[DW_OP_plus_uconst 0x18]
	.dwattr $C$DW$323, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$324	.dwtag  DW_TAG_member
	.dwattr $C$DW$324, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$324, DW_AT_name("PDIN")
	.dwattr $C$DW$324, DW_AT_TI_symbol_name("_PDIN")
	.dwattr $C$DW$324, DW_AT_data_member_location[DW_OP_plus_uconst 0x1c]
	.dwattr $C$DW$324, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$325	.dwtag  DW_TAG_member
	.dwattr $C$DW$325, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$325, DW_AT_name("PDCLR")
	.dwattr $C$DW$325, DW_AT_TI_symbol_name("_PDCLR")
	.dwattr $C$DW$325, DW_AT_data_member_location[DW_OP_plus_uconst 0x20]
	.dwattr $C$DW$325, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$326	.dwtag  DW_TAG_member
	.dwattr $C$DW$326, DW_AT_type(*$C$DW$T$31)
	.dwattr $C$DW$326, DW_AT_name("RSVD1")
	.dwattr $C$DW$326, DW_AT_TI_symbol_name("_RSVD1")
	.dwattr $C$DW$326, DW_AT_data_member_location[DW_OP_plus_uconst 0x24]
	.dwattr $C$DW$326, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$327	.dwtag  DW_TAG_member
	.dwattr $C$DW$327, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$327, DW_AT_name("GBLCTL")
	.dwattr $C$DW$327, DW_AT_TI_symbol_name("_GBLCTL")
	.dwattr $C$DW$327, DW_AT_data_member_location[DW_OP_plus_uconst 0x44]
	.dwattr $C$DW$327, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$328	.dwtag  DW_TAG_member
	.dwattr $C$DW$328, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$328, DW_AT_name("AMUTE")
	.dwattr $C$DW$328, DW_AT_TI_symbol_name("_AMUTE")
	.dwattr $C$DW$328, DW_AT_data_member_location[DW_OP_plus_uconst 0x48]
	.dwattr $C$DW$328, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$329	.dwtag  DW_TAG_member
	.dwattr $C$DW$329, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$329, DW_AT_name("DLBCTL")
	.dwattr $C$DW$329, DW_AT_TI_symbol_name("_DLBCTL")
	.dwattr $C$DW$329, DW_AT_data_member_location[DW_OP_plus_uconst 0x4c]
	.dwattr $C$DW$329, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$330	.dwtag  DW_TAG_member
	.dwattr $C$DW$330, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$330, DW_AT_name("DITCTL")
	.dwattr $C$DW$330, DW_AT_TI_symbol_name("_DITCTL")
	.dwattr $C$DW$330, DW_AT_data_member_location[DW_OP_plus_uconst 0x50]
	.dwattr $C$DW$330, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$331	.dwtag  DW_TAG_member
	.dwattr $C$DW$331, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$331, DW_AT_name("RSVD2")
	.dwattr $C$DW$331, DW_AT_TI_symbol_name("_RSVD2")
	.dwattr $C$DW$331, DW_AT_data_member_location[DW_OP_plus_uconst 0x54]
	.dwattr $C$DW$331, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$332	.dwtag  DW_TAG_member
	.dwattr $C$DW$332, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$332, DW_AT_name("RGBLCTL")
	.dwattr $C$DW$332, DW_AT_TI_symbol_name("_RGBLCTL")
	.dwattr $C$DW$332, DW_AT_data_member_location[DW_OP_plus_uconst 0x60]
	.dwattr $C$DW$332, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$333	.dwtag  DW_TAG_member
	.dwattr $C$DW$333, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$333, DW_AT_name("RMASK")
	.dwattr $C$DW$333, DW_AT_TI_symbol_name("_RMASK")
	.dwattr $C$DW$333, DW_AT_data_member_location[DW_OP_plus_uconst 0x64]
	.dwattr $C$DW$333, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$334	.dwtag  DW_TAG_member
	.dwattr $C$DW$334, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$334, DW_AT_name("RFMT")
	.dwattr $C$DW$334, DW_AT_TI_symbol_name("_RFMT")
	.dwattr $C$DW$334, DW_AT_data_member_location[DW_OP_plus_uconst 0x68]
	.dwattr $C$DW$334, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$335	.dwtag  DW_TAG_member
	.dwattr $C$DW$335, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$335, DW_AT_name("AFSRCTL")
	.dwattr $C$DW$335, DW_AT_TI_symbol_name("_AFSRCTL")
	.dwattr $C$DW$335, DW_AT_data_member_location[DW_OP_plus_uconst 0x6c]
	.dwattr $C$DW$335, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$336	.dwtag  DW_TAG_member
	.dwattr $C$DW$336, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$336, DW_AT_name("ACLKRCTL")
	.dwattr $C$DW$336, DW_AT_TI_symbol_name("_ACLKRCTL")
	.dwattr $C$DW$336, DW_AT_data_member_location[DW_OP_plus_uconst 0x70]
	.dwattr $C$DW$336, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$337	.dwtag  DW_TAG_member
	.dwattr $C$DW$337, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$337, DW_AT_name("AHCLKRCTL")
	.dwattr $C$DW$337, DW_AT_TI_symbol_name("_AHCLKRCTL")
	.dwattr $C$DW$337, DW_AT_data_member_location[DW_OP_plus_uconst 0x74]
	.dwattr $C$DW$337, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$338	.dwtag  DW_TAG_member
	.dwattr $C$DW$338, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$338, DW_AT_name("RTDM")
	.dwattr $C$DW$338, DW_AT_TI_symbol_name("_RTDM")
	.dwattr $C$DW$338, DW_AT_data_member_location[DW_OP_plus_uconst 0x78]
	.dwattr $C$DW$338, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$339	.dwtag  DW_TAG_member
	.dwattr $C$DW$339, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$339, DW_AT_name("RINTCTL")
	.dwattr $C$DW$339, DW_AT_TI_symbol_name("_RINTCTL")
	.dwattr $C$DW$339, DW_AT_data_member_location[DW_OP_plus_uconst 0x7c]
	.dwattr $C$DW$339, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$340	.dwtag  DW_TAG_member
	.dwattr $C$DW$340, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$340, DW_AT_name("RSTAT")
	.dwattr $C$DW$340, DW_AT_TI_symbol_name("_RSTAT")
	.dwattr $C$DW$340, DW_AT_data_member_location[DW_OP_plus_uconst 0x80]
	.dwattr $C$DW$340, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$341	.dwtag  DW_TAG_member
	.dwattr $C$DW$341, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$341, DW_AT_name("RSLOT")
	.dwattr $C$DW$341, DW_AT_TI_symbol_name("_RSLOT")
	.dwattr $C$DW$341, DW_AT_data_member_location[DW_OP_plus_uconst 0x84]
	.dwattr $C$DW$341, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$342	.dwtag  DW_TAG_member
	.dwattr $C$DW$342, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$342, DW_AT_name("RCLKCHK")
	.dwattr $C$DW$342, DW_AT_TI_symbol_name("_RCLKCHK")
	.dwattr $C$DW$342, DW_AT_data_member_location[DW_OP_plus_uconst 0x88]
	.dwattr $C$DW$342, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$343	.dwtag  DW_TAG_member
	.dwattr $C$DW$343, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$343, DW_AT_name("REVTCTL")
	.dwattr $C$DW$343, DW_AT_TI_symbol_name("_REVTCTL")
	.dwattr $C$DW$343, DW_AT_data_member_location[DW_OP_plus_uconst 0x8c]
	.dwattr $C$DW$343, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$344	.dwtag  DW_TAG_member
	.dwattr $C$DW$344, DW_AT_type(*$C$DW$T$32)
	.dwattr $C$DW$344, DW_AT_name("RSVD3")
	.dwattr $C$DW$344, DW_AT_TI_symbol_name("_RSVD3")
	.dwattr $C$DW$344, DW_AT_data_member_location[DW_OP_plus_uconst 0x90]
	.dwattr $C$DW$344, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$345	.dwtag  DW_TAG_member
	.dwattr $C$DW$345, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$345, DW_AT_name("XGBLCTL")
	.dwattr $C$DW$345, DW_AT_TI_symbol_name("_XGBLCTL")
	.dwattr $C$DW$345, DW_AT_data_member_location[DW_OP_plus_uconst 0xa0]
	.dwattr $C$DW$345, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$346	.dwtag  DW_TAG_member
	.dwattr $C$DW$346, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$346, DW_AT_name("XMASK")
	.dwattr $C$DW$346, DW_AT_TI_symbol_name("_XMASK")
	.dwattr $C$DW$346, DW_AT_data_member_location[DW_OP_plus_uconst 0xa4]
	.dwattr $C$DW$346, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$347	.dwtag  DW_TAG_member
	.dwattr $C$DW$347, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$347, DW_AT_name("XFMT")
	.dwattr $C$DW$347, DW_AT_TI_symbol_name("_XFMT")
	.dwattr $C$DW$347, DW_AT_data_member_location[DW_OP_plus_uconst 0xa8]
	.dwattr $C$DW$347, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$348	.dwtag  DW_TAG_member
	.dwattr $C$DW$348, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$348, DW_AT_name("AFSXCTL")
	.dwattr $C$DW$348, DW_AT_TI_symbol_name("_AFSXCTL")
	.dwattr $C$DW$348, DW_AT_data_member_location[DW_OP_plus_uconst 0xac]
	.dwattr $C$DW$348, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$349	.dwtag  DW_TAG_member
	.dwattr $C$DW$349, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$349, DW_AT_name("ACLKXCTL")
	.dwattr $C$DW$349, DW_AT_TI_symbol_name("_ACLKXCTL")
	.dwattr $C$DW$349, DW_AT_data_member_location[DW_OP_plus_uconst 0xb0]
	.dwattr $C$DW$349, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$350	.dwtag  DW_TAG_member
	.dwattr $C$DW$350, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$350, DW_AT_name("AHCLKXCTL")
	.dwattr $C$DW$350, DW_AT_TI_symbol_name("_AHCLKXCTL")
	.dwattr $C$DW$350, DW_AT_data_member_location[DW_OP_plus_uconst 0xb4]
	.dwattr $C$DW$350, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$351	.dwtag  DW_TAG_member
	.dwattr $C$DW$351, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$351, DW_AT_name("XTDM")
	.dwattr $C$DW$351, DW_AT_TI_symbol_name("_XTDM")
	.dwattr $C$DW$351, DW_AT_data_member_location[DW_OP_plus_uconst 0xb8]
	.dwattr $C$DW$351, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$352	.dwtag  DW_TAG_member
	.dwattr $C$DW$352, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$352, DW_AT_name("XINTCTL")
	.dwattr $C$DW$352, DW_AT_TI_symbol_name("_XINTCTL")
	.dwattr $C$DW$352, DW_AT_data_member_location[DW_OP_plus_uconst 0xbc]
	.dwattr $C$DW$352, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$353	.dwtag  DW_TAG_member
	.dwattr $C$DW$353, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$353, DW_AT_name("XSTAT")
	.dwattr $C$DW$353, DW_AT_TI_symbol_name("_XSTAT")
	.dwattr $C$DW$353, DW_AT_data_member_location[DW_OP_plus_uconst 0xc0]
	.dwattr $C$DW$353, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$354	.dwtag  DW_TAG_member
	.dwattr $C$DW$354, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$354, DW_AT_name("XSLOT")
	.dwattr $C$DW$354, DW_AT_TI_symbol_name("_XSLOT")
	.dwattr $C$DW$354, DW_AT_data_member_location[DW_OP_plus_uconst 0xc4]
	.dwattr $C$DW$354, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$355	.dwtag  DW_TAG_member
	.dwattr $C$DW$355, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$355, DW_AT_name("XCLKCHK")
	.dwattr $C$DW$355, DW_AT_TI_symbol_name("_XCLKCHK")
	.dwattr $C$DW$355, DW_AT_data_member_location[DW_OP_plus_uconst 0xc8]
	.dwattr $C$DW$355, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$356	.dwtag  DW_TAG_member
	.dwattr $C$DW$356, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$356, DW_AT_name("XEVTCTL")
	.dwattr $C$DW$356, DW_AT_TI_symbol_name("_XEVTCTL")
	.dwattr $C$DW$356, DW_AT_data_member_location[DW_OP_plus_uconst 0xcc]
	.dwattr $C$DW$356, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$357	.dwtag  DW_TAG_member
	.dwattr $C$DW$357, DW_AT_type(*$C$DW$T$33)
	.dwattr $C$DW$357, DW_AT_name("RSVD4")
	.dwattr $C$DW$357, DW_AT_TI_symbol_name("_RSVD4")
	.dwattr $C$DW$357, DW_AT_data_member_location[DW_OP_plus_uconst 0xd0]
	.dwattr $C$DW$357, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$358	.dwtag  DW_TAG_member
	.dwattr $C$DW$358, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$358, DW_AT_name("DITCSRA0")
	.dwattr $C$DW$358, DW_AT_TI_symbol_name("_DITCSRA0")
	.dwattr $C$DW$358, DW_AT_data_member_location[DW_OP_plus_uconst 0x100]
	.dwattr $C$DW$358, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$359	.dwtag  DW_TAG_member
	.dwattr $C$DW$359, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$359, DW_AT_name("DITCSRA1")
	.dwattr $C$DW$359, DW_AT_TI_symbol_name("_DITCSRA1")
	.dwattr $C$DW$359, DW_AT_data_member_location[DW_OP_plus_uconst 0x104]
	.dwattr $C$DW$359, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$360	.dwtag  DW_TAG_member
	.dwattr $C$DW$360, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$360, DW_AT_name("DITCSRA2")
	.dwattr $C$DW$360, DW_AT_TI_symbol_name("_DITCSRA2")
	.dwattr $C$DW$360, DW_AT_data_member_location[DW_OP_plus_uconst 0x108]
	.dwattr $C$DW$360, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$361	.dwtag  DW_TAG_member
	.dwattr $C$DW$361, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$361, DW_AT_name("DITCSRA3")
	.dwattr $C$DW$361, DW_AT_TI_symbol_name("_DITCSRA3")
	.dwattr $C$DW$361, DW_AT_data_member_location[DW_OP_plus_uconst 0x10c]
	.dwattr $C$DW$361, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$362	.dwtag  DW_TAG_member
	.dwattr $C$DW$362, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$362, DW_AT_name("DITCSRA4")
	.dwattr $C$DW$362, DW_AT_TI_symbol_name("_DITCSRA4")
	.dwattr $C$DW$362, DW_AT_data_member_location[DW_OP_plus_uconst 0x110]
	.dwattr $C$DW$362, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$363	.dwtag  DW_TAG_member
	.dwattr $C$DW$363, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$363, DW_AT_name("DITCSRA5")
	.dwattr $C$DW$363, DW_AT_TI_symbol_name("_DITCSRA5")
	.dwattr $C$DW$363, DW_AT_data_member_location[DW_OP_plus_uconst 0x114]
	.dwattr $C$DW$363, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$364	.dwtag  DW_TAG_member
	.dwattr $C$DW$364, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$364, DW_AT_name("DITCSRB0")
	.dwattr $C$DW$364, DW_AT_TI_symbol_name("_DITCSRB0")
	.dwattr $C$DW$364, DW_AT_data_member_location[DW_OP_plus_uconst 0x118]
	.dwattr $C$DW$364, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$365	.dwtag  DW_TAG_member
	.dwattr $C$DW$365, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$365, DW_AT_name("DITCSRB1")
	.dwattr $C$DW$365, DW_AT_TI_symbol_name("_DITCSRB1")
	.dwattr $C$DW$365, DW_AT_data_member_location[DW_OP_plus_uconst 0x11c]
	.dwattr $C$DW$365, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$366	.dwtag  DW_TAG_member
	.dwattr $C$DW$366, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$366, DW_AT_name("DITCSRB2")
	.dwattr $C$DW$366, DW_AT_TI_symbol_name("_DITCSRB2")
	.dwattr $C$DW$366, DW_AT_data_member_location[DW_OP_plus_uconst 0x120]
	.dwattr $C$DW$366, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$367	.dwtag  DW_TAG_member
	.dwattr $C$DW$367, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$367, DW_AT_name("DITCSRB3")
	.dwattr $C$DW$367, DW_AT_TI_symbol_name("_DITCSRB3")
	.dwattr $C$DW$367, DW_AT_data_member_location[DW_OP_plus_uconst 0x124]
	.dwattr $C$DW$367, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$368	.dwtag  DW_TAG_member
	.dwattr $C$DW$368, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$368, DW_AT_name("DITCSRB4")
	.dwattr $C$DW$368, DW_AT_TI_symbol_name("_DITCSRB4")
	.dwattr $C$DW$368, DW_AT_data_member_location[DW_OP_plus_uconst 0x128]
	.dwattr $C$DW$368, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$369	.dwtag  DW_TAG_member
	.dwattr $C$DW$369, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$369, DW_AT_name("DITCSRB5")
	.dwattr $C$DW$369, DW_AT_TI_symbol_name("_DITCSRB5")
	.dwattr $C$DW$369, DW_AT_data_member_location[DW_OP_plus_uconst 0x12c]
	.dwattr $C$DW$369, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$370	.dwtag  DW_TAG_member
	.dwattr $C$DW$370, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$370, DW_AT_name("DITUDRA0")
	.dwattr $C$DW$370, DW_AT_TI_symbol_name("_DITUDRA0")
	.dwattr $C$DW$370, DW_AT_data_member_location[DW_OP_plus_uconst 0x130]
	.dwattr $C$DW$370, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$371	.dwtag  DW_TAG_member
	.dwattr $C$DW$371, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$371, DW_AT_name("DITUDRA1")
	.dwattr $C$DW$371, DW_AT_TI_symbol_name("_DITUDRA1")
	.dwattr $C$DW$371, DW_AT_data_member_location[DW_OP_plus_uconst 0x134]
	.dwattr $C$DW$371, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$372	.dwtag  DW_TAG_member
	.dwattr $C$DW$372, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$372, DW_AT_name("DITUDRA2")
	.dwattr $C$DW$372, DW_AT_TI_symbol_name("_DITUDRA2")
	.dwattr $C$DW$372, DW_AT_data_member_location[DW_OP_plus_uconst 0x138]
	.dwattr $C$DW$372, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$373	.dwtag  DW_TAG_member
	.dwattr $C$DW$373, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$373, DW_AT_name("DITUDRA3")
	.dwattr $C$DW$373, DW_AT_TI_symbol_name("_DITUDRA3")
	.dwattr $C$DW$373, DW_AT_data_member_location[DW_OP_plus_uconst 0x13c]
	.dwattr $C$DW$373, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$374	.dwtag  DW_TAG_member
	.dwattr $C$DW$374, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$374, DW_AT_name("DITUDRA4")
	.dwattr $C$DW$374, DW_AT_TI_symbol_name("_DITUDRA4")
	.dwattr $C$DW$374, DW_AT_data_member_location[DW_OP_plus_uconst 0x140]
	.dwattr $C$DW$374, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$375	.dwtag  DW_TAG_member
	.dwattr $C$DW$375, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$375, DW_AT_name("DITUDRA5")
	.dwattr $C$DW$375, DW_AT_TI_symbol_name("_DITUDRA5")
	.dwattr $C$DW$375, DW_AT_data_member_location[DW_OP_plus_uconst 0x144]
	.dwattr $C$DW$375, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$376	.dwtag  DW_TAG_member
	.dwattr $C$DW$376, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$376, DW_AT_name("DITUDRB0")
	.dwattr $C$DW$376, DW_AT_TI_symbol_name("_DITUDRB0")
	.dwattr $C$DW$376, DW_AT_data_member_location[DW_OP_plus_uconst 0x148]
	.dwattr $C$DW$376, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$377	.dwtag  DW_TAG_member
	.dwattr $C$DW$377, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$377, DW_AT_name("DITUDRB1")
	.dwattr $C$DW$377, DW_AT_TI_symbol_name("_DITUDRB1")
	.dwattr $C$DW$377, DW_AT_data_member_location[DW_OP_plus_uconst 0x14c]
	.dwattr $C$DW$377, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$378	.dwtag  DW_TAG_member
	.dwattr $C$DW$378, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$378, DW_AT_name("DITUDRB2")
	.dwattr $C$DW$378, DW_AT_TI_symbol_name("_DITUDRB2")
	.dwattr $C$DW$378, DW_AT_data_member_location[DW_OP_plus_uconst 0x150]
	.dwattr $C$DW$378, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$379	.dwtag  DW_TAG_member
	.dwattr $C$DW$379, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$379, DW_AT_name("DITUDRB3")
	.dwattr $C$DW$379, DW_AT_TI_symbol_name("_DITUDRB3")
	.dwattr $C$DW$379, DW_AT_data_member_location[DW_OP_plus_uconst 0x154]
	.dwattr $C$DW$379, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$380	.dwtag  DW_TAG_member
	.dwattr $C$DW$380, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$380, DW_AT_name("DITUDRB4")
	.dwattr $C$DW$380, DW_AT_TI_symbol_name("_DITUDRB4")
	.dwattr $C$DW$380, DW_AT_data_member_location[DW_OP_plus_uconst 0x158]
	.dwattr $C$DW$380, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$381	.dwtag  DW_TAG_member
	.dwattr $C$DW$381, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$381, DW_AT_name("DITUDRB5")
	.dwattr $C$DW$381, DW_AT_TI_symbol_name("_DITUDRB5")
	.dwattr $C$DW$381, DW_AT_data_member_location[DW_OP_plus_uconst 0x15c]
	.dwattr $C$DW$381, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$382	.dwtag  DW_TAG_member
	.dwattr $C$DW$382, DW_AT_type(*$C$DW$T$31)
	.dwattr $C$DW$382, DW_AT_name("RSVD5")
	.dwattr $C$DW$382, DW_AT_TI_symbol_name("_RSVD5")
	.dwattr $C$DW$382, DW_AT_data_member_location[DW_OP_plus_uconst 0x160]
	.dwattr $C$DW$382, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$383	.dwtag  DW_TAG_member
	.dwattr $C$DW$383, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$383, DW_AT_name("SRCTL0")
	.dwattr $C$DW$383, DW_AT_TI_symbol_name("_SRCTL0")
	.dwattr $C$DW$383, DW_AT_data_member_location[DW_OP_plus_uconst 0x180]
	.dwattr $C$DW$383, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$384	.dwtag  DW_TAG_member
	.dwattr $C$DW$384, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$384, DW_AT_name("SRCTL1")
	.dwattr $C$DW$384, DW_AT_TI_symbol_name("_SRCTL1")
	.dwattr $C$DW$384, DW_AT_data_member_location[DW_OP_plus_uconst 0x184]
	.dwattr $C$DW$384, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$385	.dwtag  DW_TAG_member
	.dwattr $C$DW$385, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$385, DW_AT_name("SRCTL2")
	.dwattr $C$DW$385, DW_AT_TI_symbol_name("_SRCTL2")
	.dwattr $C$DW$385, DW_AT_data_member_location[DW_OP_plus_uconst 0x188]
	.dwattr $C$DW$385, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$386	.dwtag  DW_TAG_member
	.dwattr $C$DW$386, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$386, DW_AT_name("SRCTL3")
	.dwattr $C$DW$386, DW_AT_TI_symbol_name("_SRCTL3")
	.dwattr $C$DW$386, DW_AT_data_member_location[DW_OP_plus_uconst 0x18c]
	.dwattr $C$DW$386, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$387	.dwtag  DW_TAG_member
	.dwattr $C$DW$387, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$387, DW_AT_name("SRCTL4")
	.dwattr $C$DW$387, DW_AT_TI_symbol_name("_SRCTL4")
	.dwattr $C$DW$387, DW_AT_data_member_location[DW_OP_plus_uconst 0x190]
	.dwattr $C$DW$387, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$388	.dwtag  DW_TAG_member
	.dwattr $C$DW$388, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$388, DW_AT_name("SRCTL5")
	.dwattr $C$DW$388, DW_AT_TI_symbol_name("_SRCTL5")
	.dwattr $C$DW$388, DW_AT_data_member_location[DW_OP_plus_uconst 0x194]
	.dwattr $C$DW$388, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$389	.dwtag  DW_TAG_member
	.dwattr $C$DW$389, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$389, DW_AT_name("SRCTL6")
	.dwattr $C$DW$389, DW_AT_TI_symbol_name("_SRCTL6")
	.dwattr $C$DW$389, DW_AT_data_member_location[DW_OP_plus_uconst 0x198]
	.dwattr $C$DW$389, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$390	.dwtag  DW_TAG_member
	.dwattr $C$DW$390, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$390, DW_AT_name("SRCTL7")
	.dwattr $C$DW$390, DW_AT_TI_symbol_name("_SRCTL7")
	.dwattr $C$DW$390, DW_AT_data_member_location[DW_OP_plus_uconst 0x19c]
	.dwattr $C$DW$390, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$391	.dwtag  DW_TAG_member
	.dwattr $C$DW$391, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$391, DW_AT_name("SRCTL8")
	.dwattr $C$DW$391, DW_AT_TI_symbol_name("_SRCTL8")
	.dwattr $C$DW$391, DW_AT_data_member_location[DW_OP_plus_uconst 0x1a0]
	.dwattr $C$DW$391, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$392	.dwtag  DW_TAG_member
	.dwattr $C$DW$392, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$392, DW_AT_name("SRCTL9")
	.dwattr $C$DW$392, DW_AT_TI_symbol_name("_SRCTL9")
	.dwattr $C$DW$392, DW_AT_data_member_location[DW_OP_plus_uconst 0x1a4]
	.dwattr $C$DW$392, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$393	.dwtag  DW_TAG_member
	.dwattr $C$DW$393, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$393, DW_AT_name("SRCTL10")
	.dwattr $C$DW$393, DW_AT_TI_symbol_name("_SRCTL10")
	.dwattr $C$DW$393, DW_AT_data_member_location[DW_OP_plus_uconst 0x1a8]
	.dwattr $C$DW$393, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$394	.dwtag  DW_TAG_member
	.dwattr $C$DW$394, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$394, DW_AT_name("SRCTL11")
	.dwattr $C$DW$394, DW_AT_TI_symbol_name("_SRCTL11")
	.dwattr $C$DW$394, DW_AT_data_member_location[DW_OP_plus_uconst 0x1ac]
	.dwattr $C$DW$394, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$395	.dwtag  DW_TAG_member
	.dwattr $C$DW$395, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$395, DW_AT_name("SRCTL12")
	.dwattr $C$DW$395, DW_AT_TI_symbol_name("_SRCTL12")
	.dwattr $C$DW$395, DW_AT_data_member_location[DW_OP_plus_uconst 0x1b0]
	.dwattr $C$DW$395, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$396	.dwtag  DW_TAG_member
	.dwattr $C$DW$396, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$396, DW_AT_name("SRCTL13")
	.dwattr $C$DW$396, DW_AT_TI_symbol_name("_SRCTL13")
	.dwattr $C$DW$396, DW_AT_data_member_location[DW_OP_plus_uconst 0x1b4]
	.dwattr $C$DW$396, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$397	.dwtag  DW_TAG_member
	.dwattr $C$DW$397, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$397, DW_AT_name("SRCTL14")
	.dwattr $C$DW$397, DW_AT_TI_symbol_name("_SRCTL14")
	.dwattr $C$DW$397, DW_AT_data_member_location[DW_OP_plus_uconst 0x1b8]
	.dwattr $C$DW$397, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$398	.dwtag  DW_TAG_member
	.dwattr $C$DW$398, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$398, DW_AT_name("SRCTL15")
	.dwattr $C$DW$398, DW_AT_TI_symbol_name("_SRCTL15")
	.dwattr $C$DW$398, DW_AT_data_member_location[DW_OP_plus_uconst 0x1bc]
	.dwattr $C$DW$398, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$399	.dwtag  DW_TAG_member
	.dwattr $C$DW$399, DW_AT_type(*$C$DW$T$34)
	.dwattr $C$DW$399, DW_AT_name("RSVD6")
	.dwattr $C$DW$399, DW_AT_TI_symbol_name("_RSVD6")
	.dwattr $C$DW$399, DW_AT_data_member_location[DW_OP_plus_uconst 0x1c0]
	.dwattr $C$DW$399, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$400	.dwtag  DW_TAG_member
	.dwattr $C$DW$400, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$400, DW_AT_name("XBUF0")
	.dwattr $C$DW$400, DW_AT_TI_symbol_name("_XBUF0")
	.dwattr $C$DW$400, DW_AT_data_member_location[DW_OP_plus_uconst 0x200]
	.dwattr $C$DW$400, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$401	.dwtag  DW_TAG_member
	.dwattr $C$DW$401, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$401, DW_AT_name("XBUF1")
	.dwattr $C$DW$401, DW_AT_TI_symbol_name("_XBUF1")
	.dwattr $C$DW$401, DW_AT_data_member_location[DW_OP_plus_uconst 0x204]
	.dwattr $C$DW$401, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$402	.dwtag  DW_TAG_member
	.dwattr $C$DW$402, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$402, DW_AT_name("XBUF2")
	.dwattr $C$DW$402, DW_AT_TI_symbol_name("_XBUF2")
	.dwattr $C$DW$402, DW_AT_data_member_location[DW_OP_plus_uconst 0x208]
	.dwattr $C$DW$402, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$403	.dwtag  DW_TAG_member
	.dwattr $C$DW$403, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$403, DW_AT_name("XBUF3")
	.dwattr $C$DW$403, DW_AT_TI_symbol_name("_XBUF3")
	.dwattr $C$DW$403, DW_AT_data_member_location[DW_OP_plus_uconst 0x20c]
	.dwattr $C$DW$403, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$404	.dwtag  DW_TAG_member
	.dwattr $C$DW$404, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$404, DW_AT_name("XBUF4")
	.dwattr $C$DW$404, DW_AT_TI_symbol_name("_XBUF4")
	.dwattr $C$DW$404, DW_AT_data_member_location[DW_OP_plus_uconst 0x210]
	.dwattr $C$DW$404, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$405	.dwtag  DW_TAG_member
	.dwattr $C$DW$405, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$405, DW_AT_name("XBUF5")
	.dwattr $C$DW$405, DW_AT_TI_symbol_name("_XBUF5")
	.dwattr $C$DW$405, DW_AT_data_member_location[DW_OP_plus_uconst 0x214]
	.dwattr $C$DW$405, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$406	.dwtag  DW_TAG_member
	.dwattr $C$DW$406, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$406, DW_AT_name("XBUF6")
	.dwattr $C$DW$406, DW_AT_TI_symbol_name("_XBUF6")
	.dwattr $C$DW$406, DW_AT_data_member_location[DW_OP_plus_uconst 0x218]
	.dwattr $C$DW$406, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$407	.dwtag  DW_TAG_member
	.dwattr $C$DW$407, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$407, DW_AT_name("XBUF7")
	.dwattr $C$DW$407, DW_AT_TI_symbol_name("_XBUF7")
	.dwattr $C$DW$407, DW_AT_data_member_location[DW_OP_plus_uconst 0x21c]
	.dwattr $C$DW$407, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$408	.dwtag  DW_TAG_member
	.dwattr $C$DW$408, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$408, DW_AT_name("XBUF8")
	.dwattr $C$DW$408, DW_AT_TI_symbol_name("_XBUF8")
	.dwattr $C$DW$408, DW_AT_data_member_location[DW_OP_plus_uconst 0x220]
	.dwattr $C$DW$408, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$409	.dwtag  DW_TAG_member
	.dwattr $C$DW$409, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$409, DW_AT_name("XBUF9")
	.dwattr $C$DW$409, DW_AT_TI_symbol_name("_XBUF9")
	.dwattr $C$DW$409, DW_AT_data_member_location[DW_OP_plus_uconst 0x224]
	.dwattr $C$DW$409, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$410	.dwtag  DW_TAG_member
	.dwattr $C$DW$410, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$410, DW_AT_name("XBUF10")
	.dwattr $C$DW$410, DW_AT_TI_symbol_name("_XBUF10")
	.dwattr $C$DW$410, DW_AT_data_member_location[DW_OP_plus_uconst 0x228]
	.dwattr $C$DW$410, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$411	.dwtag  DW_TAG_member
	.dwattr $C$DW$411, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$411, DW_AT_name("XBUF11")
	.dwattr $C$DW$411, DW_AT_TI_symbol_name("_XBUF11")
	.dwattr $C$DW$411, DW_AT_data_member_location[DW_OP_plus_uconst 0x22c]
	.dwattr $C$DW$411, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$412	.dwtag  DW_TAG_member
	.dwattr $C$DW$412, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$412, DW_AT_name("XBUF12")
	.dwattr $C$DW$412, DW_AT_TI_symbol_name("_XBUF12")
	.dwattr $C$DW$412, DW_AT_data_member_location[DW_OP_plus_uconst 0x230]
	.dwattr $C$DW$412, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$413	.dwtag  DW_TAG_member
	.dwattr $C$DW$413, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$413, DW_AT_name("XBUF13")
	.dwattr $C$DW$413, DW_AT_TI_symbol_name("_XBUF13")
	.dwattr $C$DW$413, DW_AT_data_member_location[DW_OP_plus_uconst 0x234]
	.dwattr $C$DW$413, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$414	.dwtag  DW_TAG_member
	.dwattr $C$DW$414, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$414, DW_AT_name("XBUF14")
	.dwattr $C$DW$414, DW_AT_TI_symbol_name("_XBUF14")
	.dwattr $C$DW$414, DW_AT_data_member_location[DW_OP_plus_uconst 0x238]
	.dwattr $C$DW$414, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$415	.dwtag  DW_TAG_member
	.dwattr $C$DW$415, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$415, DW_AT_name("XBUF15")
	.dwattr $C$DW$415, DW_AT_TI_symbol_name("_XBUF15")
	.dwattr $C$DW$415, DW_AT_data_member_location[DW_OP_plus_uconst 0x23c]
	.dwattr $C$DW$415, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$416	.dwtag  DW_TAG_member
	.dwattr $C$DW$416, DW_AT_type(*$C$DW$T$34)
	.dwattr $C$DW$416, DW_AT_name("RSVD7")
	.dwattr $C$DW$416, DW_AT_TI_symbol_name("_RSVD7")
	.dwattr $C$DW$416, DW_AT_data_member_location[DW_OP_plus_uconst 0x240]
	.dwattr $C$DW$416, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$417	.dwtag  DW_TAG_member
	.dwattr $C$DW$417, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$417, DW_AT_name("RBUF0")
	.dwattr $C$DW$417, DW_AT_TI_symbol_name("_RBUF0")
	.dwattr $C$DW$417, DW_AT_data_member_location[DW_OP_plus_uconst 0x280]
	.dwattr $C$DW$417, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$418	.dwtag  DW_TAG_member
	.dwattr $C$DW$418, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$418, DW_AT_name("RBUF1")
	.dwattr $C$DW$418, DW_AT_TI_symbol_name("_RBUF1")
	.dwattr $C$DW$418, DW_AT_data_member_location[DW_OP_plus_uconst 0x284]
	.dwattr $C$DW$418, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$419	.dwtag  DW_TAG_member
	.dwattr $C$DW$419, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$419, DW_AT_name("RBUF2")
	.dwattr $C$DW$419, DW_AT_TI_symbol_name("_RBUF2")
	.dwattr $C$DW$419, DW_AT_data_member_location[DW_OP_plus_uconst 0x288]
	.dwattr $C$DW$419, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$420	.dwtag  DW_TAG_member
	.dwattr $C$DW$420, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$420, DW_AT_name("RBUF3")
	.dwattr $C$DW$420, DW_AT_TI_symbol_name("_RBUF3")
	.dwattr $C$DW$420, DW_AT_data_member_location[DW_OP_plus_uconst 0x28c]
	.dwattr $C$DW$420, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$421	.dwtag  DW_TAG_member
	.dwattr $C$DW$421, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$421, DW_AT_name("RBUF4")
	.dwattr $C$DW$421, DW_AT_TI_symbol_name("_RBUF4")
	.dwattr $C$DW$421, DW_AT_data_member_location[DW_OP_plus_uconst 0x290]
	.dwattr $C$DW$421, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$422	.dwtag  DW_TAG_member
	.dwattr $C$DW$422, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$422, DW_AT_name("RBUF5")
	.dwattr $C$DW$422, DW_AT_TI_symbol_name("_RBUF5")
	.dwattr $C$DW$422, DW_AT_data_member_location[DW_OP_plus_uconst 0x294]
	.dwattr $C$DW$422, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$423	.dwtag  DW_TAG_member
	.dwattr $C$DW$423, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$423, DW_AT_name("RBUF6")
	.dwattr $C$DW$423, DW_AT_TI_symbol_name("_RBUF6")
	.dwattr $C$DW$423, DW_AT_data_member_location[DW_OP_plus_uconst 0x298]
	.dwattr $C$DW$423, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$424	.dwtag  DW_TAG_member
	.dwattr $C$DW$424, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$424, DW_AT_name("RBUF7")
	.dwattr $C$DW$424, DW_AT_TI_symbol_name("_RBUF7")
	.dwattr $C$DW$424, DW_AT_data_member_location[DW_OP_plus_uconst 0x29c]
	.dwattr $C$DW$424, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$425	.dwtag  DW_TAG_member
	.dwattr $C$DW$425, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$425, DW_AT_name("RBUF8")
	.dwattr $C$DW$425, DW_AT_TI_symbol_name("_RBUF8")
	.dwattr $C$DW$425, DW_AT_data_member_location[DW_OP_plus_uconst 0x2a0]
	.dwattr $C$DW$425, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$426	.dwtag  DW_TAG_member
	.dwattr $C$DW$426, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$426, DW_AT_name("RBUF9")
	.dwattr $C$DW$426, DW_AT_TI_symbol_name("_RBUF9")
	.dwattr $C$DW$426, DW_AT_data_member_location[DW_OP_plus_uconst 0x2a4]
	.dwattr $C$DW$426, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$427	.dwtag  DW_TAG_member
	.dwattr $C$DW$427, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$427, DW_AT_name("RBUF10")
	.dwattr $C$DW$427, DW_AT_TI_symbol_name("_RBUF10")
	.dwattr $C$DW$427, DW_AT_data_member_location[DW_OP_plus_uconst 0x2a8]
	.dwattr $C$DW$427, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$428	.dwtag  DW_TAG_member
	.dwattr $C$DW$428, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$428, DW_AT_name("RBUF11")
	.dwattr $C$DW$428, DW_AT_TI_symbol_name("_RBUF11")
	.dwattr $C$DW$428, DW_AT_data_member_location[DW_OP_plus_uconst 0x2ac]
	.dwattr $C$DW$428, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$429	.dwtag  DW_TAG_member
	.dwattr $C$DW$429, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$429, DW_AT_name("RBUF12")
	.dwattr $C$DW$429, DW_AT_TI_symbol_name("_RBUF12")
	.dwattr $C$DW$429, DW_AT_data_member_location[DW_OP_plus_uconst 0x2b0]
	.dwattr $C$DW$429, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$430	.dwtag  DW_TAG_member
	.dwattr $C$DW$430, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$430, DW_AT_name("RBUF13")
	.dwattr $C$DW$430, DW_AT_TI_symbol_name("_RBUF13")
	.dwattr $C$DW$430, DW_AT_data_member_location[DW_OP_plus_uconst 0x2b4]
	.dwattr $C$DW$430, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$431	.dwtag  DW_TAG_member
	.dwattr $C$DW$431, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$431, DW_AT_name("RBUF14")
	.dwattr $C$DW$431, DW_AT_TI_symbol_name("_RBUF14")
	.dwattr $C$DW$431, DW_AT_data_member_location[DW_OP_plus_uconst 0x2b8]
	.dwattr $C$DW$431, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$432	.dwtag  DW_TAG_member
	.dwattr $C$DW$432, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$432, DW_AT_name("RBUF15")
	.dwattr $C$DW$432, DW_AT_TI_symbol_name("_RBUF15")
	.dwattr $C$DW$432, DW_AT_data_member_location[DW_OP_plus_uconst 0x2bc]
	.dwattr $C$DW$432, DW_AT_accessibility(DW_ACCESS_public)
	.dwendtag $C$DW$T$35

$C$DW$T$45	.dwtag  DW_TAG_typedef, DW_AT_name("mcasp_regs_t")
	.dwattr $C$DW$T$45, DW_AT_type(*$C$DW$T$35)
	.dwattr $C$DW$T$45, DW_AT_language(DW_LANG_C)

$C$DW$T$37	.dwtag  DW_TAG_union_type
	.dwattr $C$DW$T$37, DW_AT_byte_size(0x04)
$C$DW$433	.dwtag  DW_TAG_member
	.dwattr $C$DW$433, DW_AT_type(*$C$DW$T$19)
	.dwattr $C$DW$433, DW_AT_name("uint")
	.dwattr $C$DW$433, DW_AT_TI_symbol_name("_uint")
	.dwattr $C$DW$433, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$433, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$434	.dwtag  DW_TAG_member
	.dwattr $C$DW$434, DW_AT_type(*$C$DW$T$36)
	.dwattr $C$DW$434, DW_AT_name("channel")
	.dwattr $C$DW$434, DW_AT_TI_symbol_name("_channel")
	.dwattr $C$DW$434, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$434, DW_AT_accessibility(DW_ACCESS_public)
	.dwendtag $C$DW$T$37

$C$DW$T$46	.dwtag  DW_TAG_typedef, DW_AT_name("AIC31_data_type")
	.dwattr $C$DW$T$46, DW_AT_type(*$C$DW$T$37)
	.dwattr $C$DW$T$46, DW_AT_language(DW_LANG_C)

$C$DW$T$38	.dwtag  DW_TAG_structure_type
	.dwattr $C$DW$T$38, DW_AT_name("BITVAL")
	.dwattr $C$DW$T$38, DW_AT_byte_size(0x02)
$C$DW$435	.dwtag  DW_TAG_member
	.dwattr $C$DW$435, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$435, DW_AT_name("b0")
	.dwattr $C$DW$435, DW_AT_TI_symbol_name("_b0")
	.dwattr $C$DW$435, DW_AT_bit_offset(0x1f), DW_AT_bit_size(0x01)
	.dwattr $C$DW$435, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$435, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$436	.dwtag  DW_TAG_member
	.dwattr $C$DW$436, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$436, DW_AT_name("b1")
	.dwattr $C$DW$436, DW_AT_TI_symbol_name("_b1")
	.dwattr $C$DW$436, DW_AT_bit_offset(0x1e), DW_AT_bit_size(0x01)
	.dwattr $C$DW$436, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$436, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$437	.dwtag  DW_TAG_member
	.dwattr $C$DW$437, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$437, DW_AT_name("b2")
	.dwattr $C$DW$437, DW_AT_TI_symbol_name("_b2")
	.dwattr $C$DW$437, DW_AT_bit_offset(0x1d), DW_AT_bit_size(0x01)
	.dwattr $C$DW$437, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$437, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$438	.dwtag  DW_TAG_member
	.dwattr $C$DW$438, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$438, DW_AT_name("b3")
	.dwattr $C$DW$438, DW_AT_TI_symbol_name("_b3")
	.dwattr $C$DW$438, DW_AT_bit_offset(0x1c), DW_AT_bit_size(0x01)
	.dwattr $C$DW$438, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$438, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$439	.dwtag  DW_TAG_member
	.dwattr $C$DW$439, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$439, DW_AT_name("b4")
	.dwattr $C$DW$439, DW_AT_TI_symbol_name("_b4")
	.dwattr $C$DW$439, DW_AT_bit_offset(0x1b), DW_AT_bit_size(0x01)
	.dwattr $C$DW$439, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$439, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$440	.dwtag  DW_TAG_member
	.dwattr $C$DW$440, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$440, DW_AT_name("b5")
	.dwattr $C$DW$440, DW_AT_TI_symbol_name("_b5")
	.dwattr $C$DW$440, DW_AT_bit_offset(0x1a), DW_AT_bit_size(0x01)
	.dwattr $C$DW$440, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$440, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$441	.dwtag  DW_TAG_member
	.dwattr $C$DW$441, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$441, DW_AT_name("b6")
	.dwattr $C$DW$441, DW_AT_TI_symbol_name("_b6")
	.dwattr $C$DW$441, DW_AT_bit_offset(0x19), DW_AT_bit_size(0x01)
	.dwattr $C$DW$441, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$441, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$442	.dwtag  DW_TAG_member
	.dwattr $C$DW$442, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$442, DW_AT_name("b7")
	.dwattr $C$DW$442, DW_AT_TI_symbol_name("_b7")
	.dwattr $C$DW$442, DW_AT_bit_offset(0x18), DW_AT_bit_size(0x01)
	.dwattr $C$DW$442, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$442, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$443	.dwtag  DW_TAG_member
	.dwattr $C$DW$443, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$443, DW_AT_name("b8")
	.dwattr $C$DW$443, DW_AT_TI_symbol_name("_b8")
	.dwattr $C$DW$443, DW_AT_bit_offset(0x17), DW_AT_bit_size(0x01)
	.dwattr $C$DW$443, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$443, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$444	.dwtag  DW_TAG_member
	.dwattr $C$DW$444, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$444, DW_AT_name("b9")
	.dwattr $C$DW$444, DW_AT_TI_symbol_name("_b9")
	.dwattr $C$DW$444, DW_AT_bit_offset(0x16), DW_AT_bit_size(0x01)
	.dwattr $C$DW$444, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$444, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$445	.dwtag  DW_TAG_member
	.dwattr $C$DW$445, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$445, DW_AT_name("b10")
	.dwattr $C$DW$445, DW_AT_TI_symbol_name("_b10")
	.dwattr $C$DW$445, DW_AT_bit_offset(0x15), DW_AT_bit_size(0x01)
	.dwattr $C$DW$445, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$445, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$446	.dwtag  DW_TAG_member
	.dwattr $C$DW$446, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$446, DW_AT_name("b11")
	.dwattr $C$DW$446, DW_AT_TI_symbol_name("_b11")
	.dwattr $C$DW$446, DW_AT_bit_offset(0x14), DW_AT_bit_size(0x01)
	.dwattr $C$DW$446, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$446, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$447	.dwtag  DW_TAG_member
	.dwattr $C$DW$447, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$447, DW_AT_name("b12")
	.dwattr $C$DW$447, DW_AT_TI_symbol_name("_b12")
	.dwattr $C$DW$447, DW_AT_bit_offset(0x13), DW_AT_bit_size(0x01)
	.dwattr $C$DW$447, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$447, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$448	.dwtag  DW_TAG_member
	.dwattr $C$DW$448, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$448, DW_AT_name("b13")
	.dwattr $C$DW$448, DW_AT_TI_symbol_name("_b13")
	.dwattr $C$DW$448, DW_AT_bit_offset(0x12), DW_AT_bit_size(0x01)
	.dwattr $C$DW$448, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$448, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$449	.dwtag  DW_TAG_member
	.dwattr $C$DW$449, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$449, DW_AT_name("dweebie")
	.dwattr $C$DW$449, DW_AT_TI_symbol_name("_dweebie")
	.dwattr $C$DW$449, DW_AT_bit_offset(0x10), DW_AT_bit_size(0x02)
	.dwattr $C$DW$449, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$449, DW_AT_accessibility(DW_ACCESS_public)
	.dwendtag $C$DW$T$38

$C$DW$T$39	.dwtag  DW_TAG_typedef, DW_AT_name("bitval")
	.dwattr $C$DW$T$39, DW_AT_type(*$C$DW$T$38)
	.dwattr $C$DW$T$39, DW_AT_language(DW_LANG_C)

$C$DW$T$40	.dwtag  DW_TAG_union_type
	.dwattr $C$DW$T$40, DW_AT_name("SHIFT_REG")
	.dwattr $C$DW$T$40, DW_AT_byte_size(0x04)
$C$DW$450	.dwtag  DW_TAG_member
	.dwattr $C$DW$450, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$450, DW_AT_name("regval")
	.dwattr $C$DW$450, DW_AT_TI_symbol_name("_regval")
	.dwattr $C$DW$450, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$450, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$451	.dwtag  DW_TAG_member
	.dwattr $C$DW$451, DW_AT_type(*$C$DW$T$39)
	.dwattr $C$DW$451, DW_AT_name("bt")
	.dwattr $C$DW$451, DW_AT_TI_symbol_name("_bt")
	.dwattr $C$DW$451, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$451, DW_AT_accessibility(DW_ACCESS_public)
	.dwendtag $C$DW$T$40

$C$DW$T$49	.dwtag  DW_TAG_typedef, DW_AT_name("shift_reg")
	.dwattr $C$DW$T$49, DW_AT_type(*$C$DW$T$40)
	.dwattr $C$DW$T$49, DW_AT_language(DW_LANG_C)
$C$DW$T$3	.dwtag  DW_TAG_pointer_type
	.dwattr $C$DW$T$3, DW_AT_address_class(0x20)
$C$DW$T$4	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$4, DW_AT_encoding(DW_ATE_boolean)
	.dwattr $C$DW$T$4, DW_AT_name("bool")
	.dwattr $C$DW$T$4, DW_AT_byte_size(0x01)
$C$DW$T$5	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$5, DW_AT_encoding(DW_ATE_signed_char)
	.dwattr $C$DW$T$5, DW_AT_name("signed char")
	.dwattr $C$DW$T$5, DW_AT_byte_size(0x01)
$C$DW$T$66	.dwtag  DW_TAG_typedef, DW_AT_name("int8_t")
	.dwattr $C$DW$T$66, DW_AT_type(*$C$DW$T$5)
	.dwattr $C$DW$T$66, DW_AT_language(DW_LANG_C)
$C$DW$T$70	.dwtag  DW_TAG_const_type
	.dwattr $C$DW$T$70, DW_AT_type(*$C$DW$T$66)
$C$DW$T$6	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$6, DW_AT_encoding(DW_ATE_unsigned_char)
	.dwattr $C$DW$T$6, DW_AT_name("unsigned char")
	.dwattr $C$DW$T$6, DW_AT_byte_size(0x01)
$C$DW$T$55	.dwtag  DW_TAG_typedef, DW_AT_name("uint8_t")
	.dwattr $C$DW$T$55, DW_AT_type(*$C$DW$T$6)
	.dwattr $C$DW$T$55, DW_AT_language(DW_LANG_C)
$C$DW$T$73	.dwtag  DW_TAG_pointer_type
	.dwattr $C$DW$T$73, DW_AT_type(*$C$DW$T$55)
	.dwattr $C$DW$T$73, DW_AT_address_class(0x20)
$C$DW$T$7	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$7, DW_AT_encoding(DW_ATE_signed_char)
	.dwattr $C$DW$T$7, DW_AT_name("wchar_t")
	.dwattr $C$DW$T$7, DW_AT_byte_size(0x02)
$C$DW$T$8	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$8, DW_AT_encoding(DW_ATE_signed)
	.dwattr $C$DW$T$8, DW_AT_name("short")
	.dwattr $C$DW$T$8, DW_AT_byte_size(0x02)

$C$DW$T$36	.dwtag  DW_TAG_array_type
	.dwattr $C$DW$T$36, DW_AT_type(*$C$DW$T$8)
	.dwattr $C$DW$T$36, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$36, DW_AT_byte_size(0x04)
$C$DW$452	.dwtag  DW_TAG_subrange_type
	.dwattr $C$DW$452, DW_AT_upper_bound(0x01)
	.dwendtag $C$DW$T$36

$C$DW$T$62	.dwtag  DW_TAG_typedef, DW_AT_name("int16_t")
	.dwattr $C$DW$T$62, DW_AT_type(*$C$DW$T$8)
	.dwattr $C$DW$T$62, DW_AT_language(DW_LANG_C)
$C$DW$T$81	.dwtag  DW_TAG_pointer_type
	.dwattr $C$DW$T$81, DW_AT_type(*$C$DW$T$62)
	.dwattr $C$DW$T$81, DW_AT_address_class(0x20)
$C$DW$T$82	.dwtag  DW_TAG_const_type
	.dwattr $C$DW$T$82, DW_AT_type(*$C$DW$T$62)
$C$DW$T$9	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$9, DW_AT_encoding(DW_ATE_unsigned)
	.dwattr $C$DW$T$9, DW_AT_name("unsigned short")
	.dwattr $C$DW$T$9, DW_AT_byte_size(0x02)
$C$DW$T$10	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$10, DW_AT_encoding(DW_ATE_signed)
	.dwattr $C$DW$T$10, DW_AT_name("int")
	.dwattr $C$DW$T$10, DW_AT_byte_size(0x04)
$C$DW$T$60	.dwtag  DW_TAG_typedef, DW_AT_name("int32_t")
	.dwattr $C$DW$T$60, DW_AT_type(*$C$DW$T$10)
	.dwattr $C$DW$T$60, DW_AT_language(DW_LANG_C)
$C$DW$T$86	.dwtag  DW_TAG_const_type
	.dwattr $C$DW$T$86, DW_AT_type(*$C$DW$T$60)
$C$DW$T$11	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$11, DW_AT_encoding(DW_ATE_unsigned)
	.dwattr $C$DW$T$11, DW_AT_name("unsigned int")
	.dwattr $C$DW$T$11, DW_AT_byte_size(0x04)
$C$DW$T$50	.dwtag  DW_TAG_typedef, DW_AT_name("size_t")
	.dwattr $C$DW$T$50, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$T$50, DW_AT_language(DW_LANG_C)
$C$DW$T$19	.dwtag  DW_TAG_typedef, DW_AT_name("uint32_t")
	.dwattr $C$DW$T$19, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$T$19, DW_AT_language(DW_LANG_C)
$C$DW$T$20	.dwtag  DW_TAG_volatile_type
	.dwattr $C$DW$T$20, DW_AT_type(*$C$DW$T$19)

$C$DW$T$21	.dwtag  DW_TAG_array_type
	.dwattr $C$DW$T$21, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$T$21, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$21, DW_AT_byte_size(0x14)
$C$DW$453	.dwtag  DW_TAG_subrange_type
	.dwattr $C$DW$453, DW_AT_upper_bound(0x04)
	.dwendtag $C$DW$T$21


$C$DW$T$22	.dwtag  DW_TAG_array_type
	.dwattr $C$DW$T$22, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$T$22, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$22, DW_AT_byte_size(0x24)
$C$DW$454	.dwtag  DW_TAG_subrange_type
	.dwattr $C$DW$454, DW_AT_upper_bound(0x08)
	.dwendtag $C$DW$T$22


$C$DW$T$23	.dwtag  DW_TAG_array_type
	.dwattr $C$DW$T$23, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$T$23, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$23, DW_AT_byte_size(0x0c)
$C$DW$455	.dwtag  DW_TAG_subrange_type
	.dwattr $C$DW$455, DW_AT_upper_bound(0x02)
	.dwendtag $C$DW$T$23


$C$DW$T$24	.dwtag  DW_TAG_array_type
	.dwattr $C$DW$T$24, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$T$24, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$24, DW_AT_byte_size(0xb4)
$C$DW$456	.dwtag  DW_TAG_subrange_type
	.dwattr $C$DW$456, DW_AT_upper_bound(0x2c)
	.dwendtag $C$DW$T$24


$C$DW$T$25	.dwtag  DW_TAG_array_type
	.dwattr $C$DW$T$25, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$T$25, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$25, DW_AT_byte_size(0xd4)
$C$DW$457	.dwtag  DW_TAG_subrange_type
	.dwattr $C$DW$457, DW_AT_upper_bound(0x34)
	.dwendtag $C$DW$T$25


$C$DW$T$26	.dwtag  DW_TAG_array_type
	.dwattr $C$DW$T$26, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$T$26, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$26, DW_AT_byte_size(0xf8)
$C$DW$458	.dwtag  DW_TAG_subrange_type
	.dwattr $C$DW$458, DW_AT_upper_bound(0x3d)
	.dwendtag $C$DW$T$26


$C$DW$T$27	.dwtag  DW_TAG_array_type
	.dwattr $C$DW$T$27, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$T$27, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$27, DW_AT_byte_size(0x3f8)
$C$DW$459	.dwtag  DW_TAG_subrange_type
	.dwattr $C$DW$459, DW_AT_upper_bound(0xfd)
	.dwendtag $C$DW$T$27


$C$DW$T$28	.dwtag  DW_TAG_array_type
	.dwattr $C$DW$T$28, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$T$28, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$28, DW_AT_byte_size(0x80)
$C$DW$460	.dwtag  DW_TAG_subrange_type
	.dwattr $C$DW$460, DW_AT_upper_bound(0x1f)
	.dwendtag $C$DW$T$28


$C$DW$T$29	.dwtag  DW_TAG_array_type
	.dwattr $C$DW$T$29, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$T$29, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$29, DW_AT_byte_size(0x180)
$C$DW$461	.dwtag  DW_TAG_subrange_type
	.dwattr $C$DW$461, DW_AT_upper_bound(0x5f)
	.dwendtag $C$DW$T$29


$C$DW$T$31	.dwtag  DW_TAG_array_type
	.dwattr $C$DW$T$31, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$T$31, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$31, DW_AT_byte_size(0x20)
$C$DW$462	.dwtag  DW_TAG_subrange_type
	.dwattr $C$DW$462, DW_AT_upper_bound(0x07)
	.dwendtag $C$DW$T$31


$C$DW$T$32	.dwtag  DW_TAG_array_type
	.dwattr $C$DW$T$32, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$T$32, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$32, DW_AT_byte_size(0x10)
$C$DW$463	.dwtag  DW_TAG_subrange_type
	.dwattr $C$DW$463, DW_AT_upper_bound(0x03)
	.dwendtag $C$DW$T$32


$C$DW$T$33	.dwtag  DW_TAG_array_type
	.dwattr $C$DW$T$33, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$T$33, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$33, DW_AT_byte_size(0x30)
$C$DW$464	.dwtag  DW_TAG_subrange_type
	.dwattr $C$DW$464, DW_AT_upper_bound(0x0b)
	.dwendtag $C$DW$T$33


$C$DW$T$34	.dwtag  DW_TAG_array_type
	.dwattr $C$DW$T$34, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$T$34, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$34, DW_AT_byte_size(0x40)
$C$DW$465	.dwtag  DW_TAG_subrange_type
	.dwattr $C$DW$465, DW_AT_upper_bound(0x0f)
	.dwendtag $C$DW$T$34

$C$DW$T$12	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$12, DW_AT_encoding(DW_ATE_signed)
	.dwattr $C$DW$T$12, DW_AT_name("long")
	.dwattr $C$DW$T$12, DW_AT_byte_size(0x08)
	.dwattr $C$DW$T$12, DW_AT_bit_size(0x28)
	.dwattr $C$DW$T$12, DW_AT_bit_offset(0x18)
$C$DW$T$13	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$13, DW_AT_encoding(DW_ATE_unsigned)
	.dwattr $C$DW$T$13, DW_AT_name("unsigned long")
	.dwattr $C$DW$T$13, DW_AT_byte_size(0x08)
	.dwattr $C$DW$T$13, DW_AT_bit_size(0x28)
	.dwattr $C$DW$T$13, DW_AT_bit_offset(0x18)
$C$DW$T$14	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$14, DW_AT_encoding(DW_ATE_signed)
	.dwattr $C$DW$T$14, DW_AT_name("long long")
	.dwattr $C$DW$T$14, DW_AT_byte_size(0x08)
$C$DW$T$15	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$15, DW_AT_encoding(DW_ATE_unsigned)
	.dwattr $C$DW$T$15, DW_AT_name("unsigned long long")
	.dwattr $C$DW$T$15, DW_AT_byte_size(0x08)
$C$DW$T$16	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$16, DW_AT_encoding(DW_ATE_float)
	.dwattr $C$DW$T$16, DW_AT_name("float")
	.dwattr $C$DW$T$16, DW_AT_byte_size(0x04)
$C$DW$T$17	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$17, DW_AT_encoding(DW_ATE_float)
	.dwattr $C$DW$T$17, DW_AT_name("double")
	.dwattr $C$DW$T$17, DW_AT_byte_size(0x08)
$C$DW$T$18	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$18, DW_AT_encoding(DW_ATE_float)
	.dwattr $C$DW$T$18, DW_AT_name("long double")
	.dwattr $C$DW$T$18, DW_AT_byte_size(0x08)
	.dwattr $C$DW$CU, DW_AT_language(DW_LANG_C)

;***************************************************************
;* DWARF CIE ENTRIES                                           *
;***************************************************************

$C$DW$CIE	.dwcie 228
	.dwcfi	cfa_register, 31
	.dwcfi	cfa_offset, 0
	.dwcfi	undefined, 0
	.dwcfi	undefined, 1
	.dwcfi	undefined, 2
	.dwcfi	undefined, 3
	.dwcfi	undefined, 4
	.dwcfi	undefined, 5
	.dwcfi	undefined, 6
	.dwcfi	undefined, 7
	.dwcfi	undefined, 8
	.dwcfi	undefined, 9
	.dwcfi	same_value, 10
	.dwcfi	same_value, 11
	.dwcfi	same_value, 12
	.dwcfi	same_value, 13
	.dwcfi	same_value, 14
	.dwcfi	same_value, 15
	.dwcfi	undefined, 16
	.dwcfi	undefined, 17
	.dwcfi	undefined, 18
	.dwcfi	undefined, 19
	.dwcfi	undefined, 20
	.dwcfi	undefined, 21
	.dwcfi	undefined, 22
	.dwcfi	undefined, 23
	.dwcfi	undefined, 24
	.dwcfi	undefined, 25
	.dwcfi	same_value, 26
	.dwcfi	same_value, 27
	.dwcfi	same_value, 28
	.dwcfi	same_value, 29
	.dwcfi	same_value, 30
	.dwcfi	same_value, 31
	.dwcfi	same_value, 32
	.dwcfi	undefined, 33
	.dwcfi	undefined, 34
	.dwcfi	undefined, 35
	.dwcfi	undefined, 36
	.dwcfi	undefined, 37
	.dwcfi	undefined, 38
	.dwcfi	undefined, 39
	.dwcfi	undefined, 40
	.dwcfi	undefined, 41
	.dwcfi	undefined, 42
	.dwcfi	undefined, 43
	.dwcfi	undefined, 44
	.dwcfi	undefined, 45
	.dwcfi	undefined, 46
	.dwcfi	undefined, 47
	.dwcfi	undefined, 48
	.dwcfi	undefined, 49
	.dwcfi	undefined, 50
	.dwcfi	undefined, 51
	.dwcfi	undefined, 52
	.dwcfi	undefined, 53
	.dwcfi	undefined, 54
	.dwcfi	undefined, 55
	.dwcfi	undefined, 56
	.dwcfi	undefined, 57
	.dwcfi	undefined, 58
	.dwcfi	undefined, 59
	.dwcfi	undefined, 60
	.dwcfi	undefined, 61
	.dwcfi	undefined, 62
	.dwcfi	undefined, 63
	.dwcfi	undefined, 64
	.dwcfi	undefined, 65
	.dwcfi	undefined, 66
	.dwcfi	undefined, 67
	.dwcfi	undefined, 68
	.dwcfi	undefined, 69
	.dwcfi	undefined, 70
	.dwcfi	undefined, 71
	.dwcfi	undefined, 72
	.dwcfi	undefined, 73
	.dwcfi	undefined, 74
	.dwcfi	undefined, 75
	.dwcfi	undefined, 76
	.dwcfi	undefined, 77
	.dwcfi	undefined, 78
	.dwcfi	undefined, 79
	.dwcfi	undefined, 80
	.dwcfi	undefined, 81
	.dwcfi	undefined, 82
	.dwcfi	undefined, 83
	.dwcfi	undefined, 84
	.dwcfi	undefined, 85
	.dwcfi	undefined, 86
	.dwcfi	undefined, 87
	.dwcfi	undefined, 88
	.dwcfi	undefined, 89
	.dwcfi	undefined, 90
	.dwcfi	undefined, 91
	.dwcfi	undefined, 92
	.dwcfi	undefined, 93
	.dwcfi	undefined, 94
	.dwcfi	undefined, 95
	.dwcfi	undefined, 96
	.dwcfi	undefined, 97
	.dwcfi	undefined, 98
	.dwcfi	undefined, 99
	.dwcfi	undefined, 100
	.dwcfi	undefined, 101
	.dwcfi	undefined, 102
	.dwcfi	undefined, 103
	.dwcfi	undefined, 104
	.dwcfi	undefined, 105
	.dwcfi	undefined, 106
	.dwcfi	undefined, 107
	.dwcfi	undefined, 108
	.dwcfi	undefined, 109
	.dwcfi	undefined, 110
	.dwcfi	undefined, 111
	.dwcfi	undefined, 112
	.dwcfi	undefined, 113
	.dwcfi	undefined, 114
	.dwcfi	undefined, 115
	.dwcfi	undefined, 116
	.dwcfi	undefined, 117
	.dwcfi	undefined, 118
	.dwcfi	undefined, 119
	.dwcfi	undefined, 120
	.dwcfi	undefined, 121
	.dwcfi	undefined, 122
	.dwcfi	undefined, 123
	.dwcfi	undefined, 124
	.dwcfi	undefined, 125
	.dwcfi	undefined, 126
	.dwcfi	undefined, 127
	.dwcfi	undefined, 128
	.dwcfi	undefined, 129
	.dwcfi	undefined, 130
	.dwcfi	undefined, 131
	.dwcfi	undefined, 132
	.dwcfi	undefined, 133
	.dwcfi	undefined, 134
	.dwcfi	undefined, 135
	.dwcfi	undefined, 136
	.dwcfi	undefined, 137
	.dwcfi	undefined, 138
	.dwcfi	undefined, 139
	.dwcfi	undefined, 140
	.dwcfi	undefined, 141
	.dwcfi	undefined, 142
	.dwcfi	undefined, 143
	.dwcfi	undefined, 144
	.dwcfi	undefined, 145
	.dwcfi	undefined, 146
	.dwcfi	undefined, 147
	.dwcfi	undefined, 148
	.dwcfi	undefined, 149
	.dwcfi	undefined, 150
	.dwcfi	undefined, 151
	.dwcfi	undefined, 152
	.dwcfi	undefined, 153
	.dwcfi	undefined, 154
	.dwcfi	undefined, 155
	.dwcfi	undefined, 156
	.dwcfi	undefined, 157
	.dwcfi	undefined, 158
	.dwcfi	undefined, 159
	.dwcfi	undefined, 160
	.dwcfi	undefined, 161
	.dwcfi	undefined, 162
	.dwcfi	undefined, 163
	.dwcfi	undefined, 164
	.dwcfi	undefined, 165
	.dwcfi	undefined, 166
	.dwcfi	undefined, 167
	.dwcfi	undefined, 168
	.dwcfi	undefined, 169
	.dwcfi	undefined, 170
	.dwcfi	undefined, 171
	.dwcfi	undefined, 172
	.dwcfi	undefined, 173
	.dwcfi	undefined, 174
	.dwcfi	undefined, 175
	.dwcfi	undefined, 176
	.dwcfi	undefined, 177
	.dwcfi	undefined, 178
	.dwcfi	undefined, 179
	.dwcfi	undefined, 180
	.dwcfi	undefined, 181
	.dwcfi	undefined, 182
	.dwcfi	undefined, 183
	.dwcfi	undefined, 184
	.dwcfi	undefined, 185
	.dwcfi	undefined, 186
	.dwcfi	undefined, 187
	.dwcfi	undefined, 188
	.dwcfi	undefined, 189
	.dwcfi	undefined, 190
	.dwcfi	undefined, 191
	.dwcfi	undefined, 192
	.dwcfi	undefined, 193
	.dwcfi	undefined, 194
	.dwcfi	undefined, 195
	.dwcfi	undefined, 196
	.dwcfi	undefined, 197
	.dwcfi	undefined, 198
	.dwcfi	undefined, 199
	.dwcfi	undefined, 200
	.dwcfi	undefined, 201
	.dwcfi	undefined, 202
	.dwcfi	undefined, 203
	.dwcfi	undefined, 204
	.dwcfi	undefined, 205
	.dwcfi	undefined, 206
	.dwcfi	undefined, 207
	.dwcfi	undefined, 208
	.dwcfi	undefined, 209
	.dwcfi	undefined, 210
	.dwcfi	undefined, 211
	.dwcfi	undefined, 212
	.dwcfi	undefined, 213
	.dwcfi	undefined, 214
	.dwcfi	undefined, 215
	.dwcfi	undefined, 216
	.dwcfi	undefined, 217
	.dwcfi	undefined, 218
	.dwcfi	undefined, 219
	.dwcfi	undefined, 220
	.dwcfi	undefined, 221
	.dwcfi	undefined, 222
	.dwcfi	undefined, 223
	.dwcfi	undefined, 224
	.dwcfi	undefined, 225
	.dwcfi	undefined, 226
	.dwcfi	undefined, 227
	.dwcfi	undefined, 228
	.dwendentry

;***************************************************************
;* DWARF REGISTER MAP                                          *
;***************************************************************

$C$DW$466	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A0")
	.dwattr $C$DW$466, DW_AT_location[DW_OP_reg0]
$C$DW$467	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A1")
	.dwattr $C$DW$467, DW_AT_location[DW_OP_reg1]
$C$DW$468	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A2")
	.dwattr $C$DW$468, DW_AT_location[DW_OP_reg2]
$C$DW$469	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A3")
	.dwattr $C$DW$469, DW_AT_location[DW_OP_reg3]
$C$DW$470	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A4")
	.dwattr $C$DW$470, DW_AT_location[DW_OP_reg4]
$C$DW$471	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A5")
	.dwattr $C$DW$471, DW_AT_location[DW_OP_reg5]
$C$DW$472	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A6")
	.dwattr $C$DW$472, DW_AT_location[DW_OP_reg6]
$C$DW$473	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A7")
	.dwattr $C$DW$473, DW_AT_location[DW_OP_reg7]
$C$DW$474	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A8")
	.dwattr $C$DW$474, DW_AT_location[DW_OP_reg8]
$C$DW$475	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A9")
	.dwattr $C$DW$475, DW_AT_location[DW_OP_reg9]
$C$DW$476	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A10")
	.dwattr $C$DW$476, DW_AT_location[DW_OP_reg10]
$C$DW$477	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A11")
	.dwattr $C$DW$477, DW_AT_location[DW_OP_reg11]
$C$DW$478	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A12")
	.dwattr $C$DW$478, DW_AT_location[DW_OP_reg12]
$C$DW$479	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A13")
	.dwattr $C$DW$479, DW_AT_location[DW_OP_reg13]
$C$DW$480	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A14")
	.dwattr $C$DW$480, DW_AT_location[DW_OP_reg14]
$C$DW$481	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A15")
	.dwattr $C$DW$481, DW_AT_location[DW_OP_reg15]
$C$DW$482	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B0")
	.dwattr $C$DW$482, DW_AT_location[DW_OP_reg16]
$C$DW$483	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B1")
	.dwattr $C$DW$483, DW_AT_location[DW_OP_reg17]
$C$DW$484	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B2")
	.dwattr $C$DW$484, DW_AT_location[DW_OP_reg18]
$C$DW$485	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B3")
	.dwattr $C$DW$485, DW_AT_location[DW_OP_reg19]
$C$DW$486	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B4")
	.dwattr $C$DW$486, DW_AT_location[DW_OP_reg20]
$C$DW$487	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B5")
	.dwattr $C$DW$487, DW_AT_location[DW_OP_reg21]
$C$DW$488	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B6")
	.dwattr $C$DW$488, DW_AT_location[DW_OP_reg22]
$C$DW$489	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B7")
	.dwattr $C$DW$489, DW_AT_location[DW_OP_reg23]
$C$DW$490	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B8")
	.dwattr $C$DW$490, DW_AT_location[DW_OP_reg24]
$C$DW$491	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B9")
	.dwattr $C$DW$491, DW_AT_location[DW_OP_reg25]
$C$DW$492	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B10")
	.dwattr $C$DW$492, DW_AT_location[DW_OP_reg26]
$C$DW$493	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B11")
	.dwattr $C$DW$493, DW_AT_location[DW_OP_reg27]
$C$DW$494	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B12")
	.dwattr $C$DW$494, DW_AT_location[DW_OP_reg28]
$C$DW$495	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B13")
	.dwattr $C$DW$495, DW_AT_location[DW_OP_reg29]
$C$DW$496	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("DP")
	.dwattr $C$DW$496, DW_AT_location[DW_OP_reg30]
$C$DW$497	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("SP")
	.dwattr $C$DW$497, DW_AT_location[DW_OP_reg31]
$C$DW$498	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("FP")
	.dwattr $C$DW$498, DW_AT_location[DW_OP_regx 0x20]
$C$DW$499	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("PC")
	.dwattr $C$DW$499, DW_AT_location[DW_OP_regx 0x21]
$C$DW$500	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("IRP")
	.dwattr $C$DW$500, DW_AT_location[DW_OP_regx 0x22]
$C$DW$501	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("IFR")
	.dwattr $C$DW$501, DW_AT_location[DW_OP_regx 0x23]
$C$DW$502	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("NRP")
	.dwattr $C$DW$502, DW_AT_location[DW_OP_regx 0x24]
$C$DW$503	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A16")
	.dwattr $C$DW$503, DW_AT_location[DW_OP_regx 0x25]
$C$DW$504	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A17")
	.dwattr $C$DW$504, DW_AT_location[DW_OP_regx 0x26]
$C$DW$505	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A18")
	.dwattr $C$DW$505, DW_AT_location[DW_OP_regx 0x27]
$C$DW$506	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A19")
	.dwattr $C$DW$506, DW_AT_location[DW_OP_regx 0x28]
$C$DW$507	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A20")
	.dwattr $C$DW$507, DW_AT_location[DW_OP_regx 0x29]
$C$DW$508	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A21")
	.dwattr $C$DW$508, DW_AT_location[DW_OP_regx 0x2a]
$C$DW$509	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A22")
	.dwattr $C$DW$509, DW_AT_location[DW_OP_regx 0x2b]
$C$DW$510	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A23")
	.dwattr $C$DW$510, DW_AT_location[DW_OP_regx 0x2c]
$C$DW$511	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A24")
	.dwattr $C$DW$511, DW_AT_location[DW_OP_regx 0x2d]
$C$DW$512	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A25")
	.dwattr $C$DW$512, DW_AT_location[DW_OP_regx 0x2e]
$C$DW$513	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A26")
	.dwattr $C$DW$513, DW_AT_location[DW_OP_regx 0x2f]
$C$DW$514	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A27")
	.dwattr $C$DW$514, DW_AT_location[DW_OP_regx 0x30]
$C$DW$515	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A28")
	.dwattr $C$DW$515, DW_AT_location[DW_OP_regx 0x31]
$C$DW$516	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A29")
	.dwattr $C$DW$516, DW_AT_location[DW_OP_regx 0x32]
$C$DW$517	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A30")
	.dwattr $C$DW$517, DW_AT_location[DW_OP_regx 0x33]
$C$DW$518	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("A31")
	.dwattr $C$DW$518, DW_AT_location[DW_OP_regx 0x34]
$C$DW$519	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B16")
	.dwattr $C$DW$519, DW_AT_location[DW_OP_regx 0x35]
$C$DW$520	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B17")
	.dwattr $C$DW$520, DW_AT_location[DW_OP_regx 0x36]
$C$DW$521	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B18")
	.dwattr $C$DW$521, DW_AT_location[DW_OP_regx 0x37]
$C$DW$522	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B19")
	.dwattr $C$DW$522, DW_AT_location[DW_OP_regx 0x38]
$C$DW$523	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B20")
	.dwattr $C$DW$523, DW_AT_location[DW_OP_regx 0x39]
$C$DW$524	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B21")
	.dwattr $C$DW$524, DW_AT_location[DW_OP_regx 0x3a]
$C$DW$525	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B22")
	.dwattr $C$DW$525, DW_AT_location[DW_OP_regx 0x3b]
$C$DW$526	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B23")
	.dwattr $C$DW$526, DW_AT_location[DW_OP_regx 0x3c]
$C$DW$527	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B24")
	.dwattr $C$DW$527, DW_AT_location[DW_OP_regx 0x3d]
$C$DW$528	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B25")
	.dwattr $C$DW$528, DW_AT_location[DW_OP_regx 0x3e]
$C$DW$529	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B26")
	.dwattr $C$DW$529, DW_AT_location[DW_OP_regx 0x3f]
$C$DW$530	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B27")
	.dwattr $C$DW$530, DW_AT_location[DW_OP_regx 0x40]
$C$DW$531	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B28")
	.dwattr $C$DW$531, DW_AT_location[DW_OP_regx 0x41]
$C$DW$532	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B29")
	.dwattr $C$DW$532, DW_AT_location[DW_OP_regx 0x42]
$C$DW$533	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B30")
	.dwattr $C$DW$533, DW_AT_location[DW_OP_regx 0x43]
$C$DW$534	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("B31")
	.dwattr $C$DW$534, DW_AT_location[DW_OP_regx 0x44]
$C$DW$535	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("AMR")
	.dwattr $C$DW$535, DW_AT_location[DW_OP_regx 0x45]
$C$DW$536	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("CSR")
	.dwattr $C$DW$536, DW_AT_location[DW_OP_regx 0x46]
$C$DW$537	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("ISR")
	.dwattr $C$DW$537, DW_AT_location[DW_OP_regx 0x47]
$C$DW$538	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("ICR")
	.dwattr $C$DW$538, DW_AT_location[DW_OP_regx 0x48]
$C$DW$539	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("IER")
	.dwattr $C$DW$539, DW_AT_location[DW_OP_regx 0x49]
$C$DW$540	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("ISTP")
	.dwattr $C$DW$540, DW_AT_location[DW_OP_regx 0x4a]
$C$DW$541	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("IN")
	.dwattr $C$DW$541, DW_AT_location[DW_OP_regx 0x4b]
$C$DW$542	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("OUT")
	.dwattr $C$DW$542, DW_AT_location[DW_OP_regx 0x4c]
$C$DW$543	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("ACR")
	.dwattr $C$DW$543, DW_AT_location[DW_OP_regx 0x4d]
$C$DW$544	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("ADR")
	.dwattr $C$DW$544, DW_AT_location[DW_OP_regx 0x4e]
$C$DW$545	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("FADCR")
	.dwattr $C$DW$545, DW_AT_location[DW_OP_regx 0x4f]
$C$DW$546	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("FAUCR")
	.dwattr $C$DW$546, DW_AT_location[DW_OP_regx 0x50]
$C$DW$547	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("FMCR")
	.dwattr $C$DW$547, DW_AT_location[DW_OP_regx 0x51]
$C$DW$548	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("GFPGFR")
	.dwattr $C$DW$548, DW_AT_location[DW_OP_regx 0x52]
$C$DW$549	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("DIER")
	.dwattr $C$DW$549, DW_AT_location[DW_OP_regx 0x53]
$C$DW$550	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("REP")
	.dwattr $C$DW$550, DW_AT_location[DW_OP_regx 0x54]
$C$DW$551	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("TSCL")
	.dwattr $C$DW$551, DW_AT_location[DW_OP_regx 0x55]
$C$DW$552	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("TSCH")
	.dwattr $C$DW$552, DW_AT_location[DW_OP_regx 0x56]
$C$DW$553	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("ARP")
	.dwattr $C$DW$553, DW_AT_location[DW_OP_regx 0x57]
$C$DW$554	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("ILC")
	.dwattr $C$DW$554, DW_AT_location[DW_OP_regx 0x58]
$C$DW$555	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("RILC")
	.dwattr $C$DW$555, DW_AT_location[DW_OP_regx 0x59]
$C$DW$556	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("DNUM")
	.dwattr $C$DW$556, DW_AT_location[DW_OP_regx 0x5a]
$C$DW$557	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("SSR")
	.dwattr $C$DW$557, DW_AT_location[DW_OP_regx 0x5b]
$C$DW$558	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("GPLYA")
	.dwattr $C$DW$558, DW_AT_location[DW_OP_regx 0x5c]
$C$DW$559	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("GPLYB")
	.dwattr $C$DW$559, DW_AT_location[DW_OP_regx 0x5d]
$C$DW$560	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("TSR")
	.dwattr $C$DW$560, DW_AT_location[DW_OP_regx 0x5e]
$C$DW$561	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("ITSR")
	.dwattr $C$DW$561, DW_AT_location[DW_OP_regx 0x5f]
$C$DW$562	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("NTSR")
	.dwattr $C$DW$562, DW_AT_location[DW_OP_regx 0x60]
$C$DW$563	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("EFR")
	.dwattr $C$DW$563, DW_AT_location[DW_OP_regx 0x61]
$C$DW$564	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("ECR")
	.dwattr $C$DW$564, DW_AT_location[DW_OP_regx 0x62]
$C$DW$565	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("IERR")
	.dwattr $C$DW$565, DW_AT_location[DW_OP_regx 0x63]
$C$DW$566	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("DMSG")
	.dwattr $C$DW$566, DW_AT_location[DW_OP_regx 0x64]
$C$DW$567	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("CMSG")
	.dwattr $C$DW$567, DW_AT_location[DW_OP_regx 0x65]
$C$DW$568	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("DT_DMA_ADDR")
	.dwattr $C$DW$568, DW_AT_location[DW_OP_regx 0x66]
$C$DW$569	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("DT_DMA_DATA")
	.dwattr $C$DW$569, DW_AT_location[DW_OP_regx 0x67]
$C$DW$570	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("DT_DMA_CNTL")
	.dwattr $C$DW$570, DW_AT_location[DW_OP_regx 0x68]
$C$DW$571	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("TCU_CNTL")
	.dwattr $C$DW$571, DW_AT_location[DW_OP_regx 0x69]
$C$DW$572	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("RTDX_REC_CNTL")
	.dwattr $C$DW$572, DW_AT_location[DW_OP_regx 0x6a]
$C$DW$573	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("RTDX_XMT_CNTL")
	.dwattr $C$DW$573, DW_AT_location[DW_OP_regx 0x6b]
$C$DW$574	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("RTDX_CFG")
	.dwattr $C$DW$574, DW_AT_location[DW_OP_regx 0x6c]
$C$DW$575	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("RTDX_RDATA")
	.dwattr $C$DW$575, DW_AT_location[DW_OP_regx 0x6d]
$C$DW$576	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("RTDX_WDATA")
	.dwattr $C$DW$576, DW_AT_location[DW_OP_regx 0x6e]
$C$DW$577	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("RTDX_RADDR")
	.dwattr $C$DW$577, DW_AT_location[DW_OP_regx 0x6f]
$C$DW$578	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("RTDX_WADDR")
	.dwattr $C$DW$578, DW_AT_location[DW_OP_regx 0x70]
$C$DW$579	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("MFREG0")
	.dwattr $C$DW$579, DW_AT_location[DW_OP_regx 0x71]
$C$DW$580	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("DBG_STAT")
	.dwattr $C$DW$580, DW_AT_location[DW_OP_regx 0x72]
$C$DW$581	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("BRK_EN")
	.dwattr $C$DW$581, DW_AT_location[DW_OP_regx 0x73]
$C$DW$582	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("HWBP0_CNT")
	.dwattr $C$DW$582, DW_AT_location[DW_OP_regx 0x74]
$C$DW$583	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("HWBP0")
	.dwattr $C$DW$583, DW_AT_location[DW_OP_regx 0x75]
$C$DW$584	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("HWBP1")
	.dwattr $C$DW$584, DW_AT_location[DW_OP_regx 0x76]
$C$DW$585	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("HWBP2")
	.dwattr $C$DW$585, DW_AT_location[DW_OP_regx 0x77]
$C$DW$586	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("HWBP3")
	.dwattr $C$DW$586, DW_AT_location[DW_OP_regx 0x78]
$C$DW$587	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("OVERLAY")
	.dwattr $C$DW$587, DW_AT_location[DW_OP_regx 0x79]
$C$DW$588	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("PC_PROF")
	.dwattr $C$DW$588, DW_AT_location[DW_OP_regx 0x7a]
$C$DW$589	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("ATSR")
	.dwattr $C$DW$589, DW_AT_location[DW_OP_regx 0x7b]
$C$DW$590	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("TRR")
	.dwattr $C$DW$590, DW_AT_location[DW_OP_regx 0x7c]
$C$DW$591	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("TCRR")
	.dwattr $C$DW$591, DW_AT_location[DW_OP_regx 0x7d]
$C$DW$592	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("DESR")
	.dwattr $C$DW$592, DW_AT_location[DW_OP_regx 0x7e]
$C$DW$593	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("DETR")
	.dwattr $C$DW$593, DW_AT_location[DW_OP_regx 0x7f]
$C$DW$594	.dwtag  DW_TAG_TI_assign_register, DW_AT_name("CIE_RETA")
	.dwattr $C$DW$594, DW_AT_location[DW_OP_regx 0xe4]
	.dwendtag $C$DW$CU

